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參數(shù)資料
| 型號： | MCM69R820AZP6 |
| 廠商： | MOTOROLA INC |
| 元件分類： | SRAM |
| 英文描述： | 4M Late Write 2.5 V I/O |
| 中文描述： | 256K X 18 LATE-WRITE SRAM, 3 ns, PBGA119 |
| 封裝： | 14 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-119 |
| 文件頁數(shù)： | 13/20頁 |
| 文件大小： | 213K |
| 代理商： | MCM69R820AZP6 |
MCM69R738A
MCM69R820A
13
MOTOROLA FAST SRAM
TAP AC OPERATING CONDITIONS AND CHARACTERISTICS
(0
°
C
≤
TA
≤
70
°
C, Unless Otherwise Noted)
Input Pulse Levels
Input Rise/Fall Time
Input Timing Measurement Reference Level
Output Timing Reference Level
0 to 3.0 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . .
1 V/ns (20% to 80%)
. . . . . . . . . . . . . . .
1.5 V
1.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . .
Output Test Load
50
Parallel Terminated T–line with 20 pF
Receiver Input Capacitance
. . . . . . . . . . . . . . .
. . . . . .
Test Load Termination Supply Voltage (VT)
1.5 V
TAP CONTROLLER TIMING
Parameter
Symbol
Min
Max
Unit
Notes
Cycle Time
tTHTH
tTHTL
tTLTH
tMVTH
tTHMX
tDVTH
tTHDX
tCS
tCH
tTLQX
tTLOV
100
—
ns
Clock High Time
40
—
ns
Clock Low Time
40
—
ns
TMS Setup
10
—
ns
TMS Hold
10
—
ns
TDI Valid to TCK High
10
—
ns
TCK High to TDI Don’t Care
10
—
ns
Capture Setup
10
—
ns
1
Capture Hold
10
—
ns
1
TCK Low to TDO Unknown
0
—
ns
TCK Low to TDO Valid
—
20
ns
NOTES:
1. tCS + tCH defines the minimum pause in RAM I/O pad transitions to assure accurate pad data capture.
AC TEST LOAD
DEVICE
UNDER
TEST
50
50
1.5 V
20 pF
tTHDX
tTLQV
tTLQX
tDVTH
tTLTH
tTHMX
tMVTH
TAP CONTROLLER TIMING DIAGRAM
tTHTH
TEST CLOCK
(TCK)
TEST MODE SELECT
(TMS)
TEST DATA IN
(TDI)
TEST DATA OUT
(TDO)
tTHTL
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| MCM69R820AZP6R | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:4M Late Write 2.5 V I/O |
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