參數(shù)資料
型號(hào)： MCP23S17-E/ML
元件分類(lèi)： 微控制器/微處理器
英文描述： 16 I/O, PIA-GENERAL PURPOSE, PQCC28
封裝： 6 X 6 MM, PLASTIC, QFN-28
文件頁(yè)數(shù)： 9/48頁(yè)
文件大?。?/td> 915K
代理商： MCP23S17-E/ML
2007 Microchip Technology Inc.
DS21952B-page 17
MCP23017/MCP23S17
1.6.6
CONFIGURATION REGISTER
The IOCON register contains several bits for
configuring the device:
The BANK bit changes how the registers are mapped
(see Table 1-5 and Table 1-6 for more details).
If BANK = 1, the registers associated with each
port are segregated. Registers associated with
PORTA are mapped from address 00h - 0Ah and
registers associated with PORTB are mapped
from 10h - 1Ah.
If BANK = 0, the A/B registers are paired. For
example, IODIRA is mapped to address 00h and
IODIRB is mapped to the next address (address
01h). The mapping for all registers is from 00h -
15h.
It is important to take care when changing the BANK bit
as the address mapping changes after the byte is
clocked into the device. The address pointer may point
to an invalid location after the bit is modified.
For example, if the device is configured to
automatically increment its internal Address Pointer,
the following scenario would occur:
BANK = 0
Write 80h to address 0Ah (IOCON) to set the
BANK bit
Once the write completes, the internal address
now points to 0Bh which is an invalid address
when the BANK bit is set.
For this reason, it is advised to only perform byte writes
to this register when changing the BANK bit.
The MIRROR bit controls how the INTA and INTB pins
function with respect to each other.
When MIRROR = 1, the INTn pins are functionally
OR’ed so that an interrupt on either port will cause
both pins to activate.
When MIRROR = 0, the INT pins are separated.
Interrupt conditions on a port will cause its
respective INT pin to activate.
The Sequential Operation (SEQOP) controls the
incrementing function of the Address Pointer. If the
address pointer is disabled, the Address Pointer does
not automatically increment after each byte is clocked
during a serial transfer. This feature is useful when it is
desired to continuously poll (read) or modify (write) a
register.
The Slew Rate (DISSLW) bit controls the slew rate
function on the SDA pin. If enabled, the SDA slew rate
will be controlled when driving from a high to low.
The Hardware Address Enable (HAEN) bit enables/
disables hardware addressing on the MCP23S17 only.
The address pins (A2, A1 and A0) must be externally
biased, regardless of the HAEN bit value.
If enabled (HAEN = 1), the device’s hardware address
matches the address pins.
If disabled (HAEN = 0), the device’s hardware address
is A2 = A1 = A0 = 0.
The Open-Drain (ODR) control bit enables/disables the
INT pin for open-drain configuration. Erasing this bit
overrides the INTPOL bit.
The Interrupt Polarity (INTPOL) sets the polarity of the
INT pin. This bit is functional only when the ODR bit is
cleared, configuring the INT pin as active push-pull.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MCP23S17T-E/ML 功能描述:接口-I/O擴(kuò)展器 16bit Input/Output Exp SPI interface RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
MCP23S17T-E/SO 功能描述:接口-I/O擴(kuò)展器 16bit Input/Output Exp SPI interface RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
MCP23S17T-E/SO 制造商:Microchip Technology Inc 功能描述:IC I/O EXPANDER 16BIT 10MHZ SOIC-28 制造商:Microchip Technology Inc 功能描述:IC, I/O EXPANDER, 16BIT, 10MHZ, SOIC-28
MCP23S17T-E/SO-CUT TAPE 制造商:Microchip 功能描述:MCP23017 Series 5.5 V 10 MHz 16-Bit I/O Expander with Serial Interface - SOIC-28
MCP23S17T-E/SP 制造商:MICROCHIP 制造商全稱(chēng):Microchip Technology 功能描述:16-Bit I/O Expander with Serial Interface
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