參數(shù)資料
型號(hào)： MCP23S18T-E/SP
元件分類： 微控制器/微處理器
英文描述： PIA-GENERAL PURPOSE, PDIP28
封裝： 0.300 INCH, PLASTIC, SPDIP-28
文件頁數(shù)： 53/56頁
文件大?。?/td> 738K
代理商： MCP23S18T-E/SP
MCP23018/MCP23S18
DS22103A-page 6
2008 Microchip Technology Inc.
TABLE 1-2:
SPI PINOUT DESCRIPTION (MCP23S18)
Pin
Name
28L
PDIP/
SOIC
24L
QFN
Pin
Type
Standard Function
GPB0
3
24
I/O
Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
GPB1
4
1
I/O
Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
GPB2
5
2
I/O
Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
GPB3
6
3
I/O
Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
GPB4
7
4
I/O
Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
GPB5
8
5
I/O
Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
GPB6
9
6
I/O
Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
GPB7
10
7
I/O
Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
VDD
11
8
P
Power (high current capable)
VSS
1
23
P
Ground (high current capable)
CS
12
9
I
Chip select
SCK
13
10
I
Serial clock input
SI
14
11
I
Serial data input
SO
15
12
O
Serial data out
RESET
16
13
I
Hardware reset (must be externally biased)
INTB
18
—
O
Interrupt output for port B. Can be configured as active high, active low, or open
drain.
INTA
19
14
O
Interrupt output for port A. Can be configured as active high, active low, or open
drain.
GPA0
20
15
I/O
Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
GPA1
21
16
I/O
Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
GPA2
22
17
I/O
Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
GPA3
23
18
I/O
Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
GPA4
24
19
I/O
Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
GPA5
25
20
I/O
Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
GPA6
26
21
I/O
Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
GPA7
27
22
I/O
Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
NC
2, 17,
28
—
Not connected
EP
—
25
—
Exposed Thermal Pad (EP). Do not electrically connect, or connect to VSS.
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