參數(shù)資料
型號(hào)： MCP25050-I/P
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PDIP14
封裝： 0.300 INCH, PLASTIC, DIP-14
文件頁數(shù)： 26/64頁
文件大?。?/td> 1232K
代理商： MCP25050-I/P
MCP2502X/5X
DS21664C-page 32
2003 Microchip Technology Inc.
REGISTER 5-1:
GPDDR - DATA DIRECTION REGISTER
REGISTER 5-2:
GPLAT - GPIO OUTPUT REGISTER
REGISTER 5-3:
IOINTEN REGISTER
U-0
R/W-1
—
DDR6
DDR5
DDR4
DDR3
DDR2
DDR1
DDR0
bit 7
bit 0
bit 7
Unimplemented: Read as ‘0’
bit 6-0
DDR6:DDR0: Data Direction Register* bits
1
= corresponding GPIO pin is configured as an input
0
= corresponding GPIO pin is configured as an output
* must bet set if corresponding analog channel is enabled (see ADCON1)
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
U-0
R/W-0
—
GP6
GP5
GP4
GP3
GP2
GP1
GP0
bit 7
bit 0
bit 7
Unimplemented: Read as '0’
bit 6-0
GP6:GP0: GPIO Bits
1
= corresponding GPIO pin output latch is a ‘1’
0
= corresponding GPIO pin output latch is a ‘0’
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
R/W-0
GP7TXC
GP6TXC GP5TXC GP4TXC
GP3TXC
GP2TXC GP1TXC
GP0TXC
bit 7
bit 0
bit 7-0
GP7TXC:GP0TXC: Transmit-on-change Enable bits
1
= Enable Transmit-On-Change/Compare For Corresponding GPIO/AN Channel
0
= Disable Transmit-On-Change/Compare For Corresponding GPIO/AN Channel
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
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