參數(shù)資料
型號: MCP25055-I/SL
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PDSO14
封裝: 0.150 INCH, PLASTIC, SOIC-14
文件頁數(shù): 48/66頁
文件大?。?/td> 1028K
代理商: MCP25055-I/SL
MCP2502X/5X
DS21664D-page 52
2007 Microchip Technology Inc.
9.2
DC Characteristics
Industrial (I):
TAMB = -40°C to +85°C
VCC = 2.7V to 5.5V
Automotive (E): TAMB = -40°C to +125°C VCC = 4.5V to 5.5V
Param.
No.
Sym
Characteristics
Min
Max
Units
Test Conditions
VDD
Supply Voltage
2.7
4.5
5.5
V
XT and LP OSC configuration
HS OSC configuration (Note 2)
SVDD
VDD Rise Rate to ensure
internal power-on reset signal
0.05
V/ms
High-level input voltage
VIH
GPIO pins
2
VDD+0.3
V
VIH
RXCAN (Schmitt Trigger)
.7 VDD
VDD
V
OSC1
.85 VDD
VDD
V
Low-level input voltage
VIL
RXCAN (Schmitt Trigger)
VSS
0.2 VDD
V
VIL
GPIO pins
-0.3
0.5V
V
OSC1
VSS
0.2 VDD
V
Low-level output voltage
VOL
TXCAN GPIO pins
0.6
V
IOL = 8.5 mA, VDD = 4.5V
High-level output voltage
V
VOH
TXCAN, GPIO pins
VDD -0.7
V
IOH =-3.0 mA, VDD = 4.5V,
I-temp
Input leakage current
ILI
All I/O except OSC1, GP7
-1
+1
A
OSC1, GP7 pin
-5
+5
A
CINT
Internal Capacitance
(all inputs and outputs, except
GP7)
—7
pF
TAMB = 25°C, fC = 1.0 MHz,
VDD = 5.0V (Note 3)
GP7
15
pF
IDD
Operating Current
20
mA
XT OSC VDD = 5.5V;
FOSC =25MHz
IDDS
Standby Current
(CAN Sleep Mode)
30
A
Inputs tied to VDD or VSS
Note 1:
This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data.
2:
Refer to Figure 9-1.
3:
This parameter is periodically sampled and not 100% tested.
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