參數(shù)資料
型號: MCP2510-E/P
廠商: Microchip Technology
文件頁數(shù): 32/80頁
文件大?。?/td> 0K
描述: IC CAN CTLR EXTENDED TEMP 18DIP
產(chǎn)品培訓模塊: CAN Bus Protection
標準包裝: 25
控制器類型: CAN 接口
接口: SPI
電源電壓: 4.5 V ~ 5.5 V
電流 - 電源: 10mA
工作溫度: -40°C ~ 125°C
安裝類型: 通孔
封裝/外殼: 18-DIP(0.300",7.62mm)
供應商設備封裝: 18-PDIP
包裝: 管件
產(chǎn)品目錄頁面: 685 (CN2011-ZH PDF)
配用: DV251001-ND - KIT DEVELOPMENT CAN MCP2510
其它名稱: MCP2510-E/PR
MCP2510-E/PR-ND
MCP2510
DS21291F-page 38
2007 Microchip Technology Inc.
FIGURE 5-3:
SHORTENING A BIT PERIOD
5.8
Programming Time Segments
Some requirements for programming of the time seg-
ments:
Prop Seg + Phase Seg 1 >= Phase Seg 2
Prop Seg + Phase Seg 1 >= TDELAY
Phase Seg 2 > Sync Jump Width
For example, assuming that a 125 kHz CAN baud rate
with FOSC = 20 MHz is desired:
TOSC = 50 nsec, choose BRP<5:0> = 04h, then TQ =
500 nsec. To obtain 125 kHz, the bit time must be 16
TQ.
Typically, the sampling of the bit should take place at
about 60-70% of the bit time, depending on the system
parameters. Also, typically, the TDELAY is 1-2 TQ.
Sync Seg = 1 TQ; Prop Seg = 2 TQ; So setting Phase
Seg 1 = 7 TQ would place the sample at 10 TQ after the
transition. This would leave 6 TQ for Phase Seg 2.
Since Phase Seg 2 is 6, by the rules, SJW could be the
maximum of 4 TQ. However, normally a large SJW is
only necessary when the clock generation of the differ-
ent nodes is inaccurate or unstable, such as using
ceramic resonators. So an SJW of 1 is typically
enough.
5.9
Oscillator Tolerance
The bit timing requirements allow ceramic resonators
to be used in applications with transmission rates of up
to 125 kbit/sec, as a rule of thumb. For the full bus
speed range of the CAN protocol, a quartz oscillator is
required. A maximum node-to-node oscillator variation
of 1.7% is allowed.
Input Signal
Sync
Prop
Segment
Phase
Segment 1
Phase
Segment 2
≤ SJW
Sample
Actual
Nominal
Bit Length
TQ
Point
Bit Length
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