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參數(shù)資料
| 型號： | MCP3204T-CI/ST |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 16/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 2.7V 4CH SPI14TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 100k |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-TSSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 4 個單端，單極；2 個偽差分，單極 |
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2008 Microchip Technology Inc.
DS21298E-page 23
MCP3204/3208
FIGURE 6-3:
The MCP601 Operational Amplifier is used to implement a second order anti-aliasing
filter for the signal being converted by the MCP3204.
6.4
Layout Considerations
When laying out a printed circuit board for use with
analog components, care should be taken to reduce
noise wherever possible. A bypass capacitor should
always be used with this device, placed as close as
possible to the device pin. A bypass capacitor value of
1 F is recommended.
Digital and analog traces should be separated as much
as possible on the board, with no traces running
underneath the device or the bypass capacitor. Extra
precautions should be taken to keep traces with high
frequency signals (such as clock lines) as far as
possible from analog traces.
Use of an analog ground plane is recommended in
order to keep the ground potential the same for all
devices on the board. Providing VDD connections to
devices in a “star” configuration can also reduce noise
by eliminating return current paths and associated
errors (see Figure 6-4). For more information on layout
tips when using A/D converters, refer to AN688,
“Layout Tips for 12-Bit A/D converter Applications”
.
FIGURE 6-4:
V
DD traces arranged in a
‘Star’ configuration in order to reduce errors
caused by current return paths.
MCP3204
VDD
10 F
IN-
IN+
-
+
VIN
C1
C2
VREF
4.096V
Reference
1F
0.1 F
MCP601
R1
R2
R3
R4
MCP1541
V
DD
Connection
Device 1
Device 2
Device 3
Device 4
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