V
參數(shù)資料
型號(hào)： MCP3423T-E/UN
廠商： Microchip Technology
文件頁(yè)數(shù)： 45/58頁(yè)
文件大?。?/td> 0K
描述： IC ADC 18BIT 3.75SPS 2CH 10-MSOP
產(chǎn)品培訓(xùn)模塊： MCP3901 Analog Front End
標(biāo)準(zhǔn)包裝： 2,500
位數(shù)： 18
采樣率（每秒）： 3.75
數(shù)據(jù)接口： I²C，串行
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 單電源
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 10-TFSOP，10-MSOP（0.118"，3.00mm 寬）
供應(yīng)商設(shè)備封裝： 10-MSOP
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 4 個(gè)單端，雙極；2 個(gè)差分，雙極
配用： MCP3423EV-ND - BOARD EVAL 18BIT 2CH ADC MCP3423
其它名稱： MCP3423T-E/UNTR
2009 Microchip Technology Inc.
DS22088C-page 5
MCP3422/3/4
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings
VDD...................................................................................7.0V
All inputs and outputs ............. ..........VSS –0.4V to VDD+0.4V
Differential Input Voltage ...................................... |VDD - VSS|
Output Short Circuit Current ................................ Continuous
Current at Input Pins ....................................................±2 mA
Current at Output and Supply Pins ............................±10 mA
Storage Temperature ....................................-65°C to +150°C
Ambient Temp. with power applied ...............-55°C to +125°C
ESD protection on all pins
................ ≥ 6kV HBM, ≥ 400V MM
Maximum Junction Temperature (TJ). .........................+150°C
Notice: Stresses above those listed under “Maximum Rat-
ings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods
may affect device reliability
.
ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise specified, all parameters apply for TA = -40°C to +85°C, VDD = +5.0V, VSS = 0V,
CHn+ = CHn- = VREF/2, VINCOM = VREF /2. All ppm units use 2*VREF as differential full scale range.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Analog Inputs
Differential Full Scale Input
Voltage Range
FSR
—
±2.048/PGA
—
V
VIN = [CHn+ - CHn-]
Maximum Input Voltage Range
VSS-0.3
—
VDD+0.3
V
Differential Input Impedance
ZIND (f)
—
2.25/PGA
—
M
Ω
During normal mode operation
Common Mode input
Impedance
ZINC (f)
—
25
—
M
Ω
PGA = 1, 2, 4, 8
System Performance
Resolution and No Missing
Codes
(Effective Number of Bits)
12
—
Bits
DR = 240 SPS
14
—
Bits
DR = 60 SPS
16
—
Bits
DR = 15 SPS
18
—
Bits
DR = 3.75 SPS
Data Rate
DR
176
240
328
SPS
12 bits mode
44
60
82
SPS
14 bits mode
11
15
20.5
SPS
16 bits mode
2.75
3.75
5.1
SPS
18 bits mode
Output Noise
—
1.5
—
VRMS
TA = +25°C, DR = 3.75 SPS,
PGA = 1, VIN+ = VIN- = GND
Integral Non-Linearity
INL
—
10
35
ppm of
FSR
DR = 3.75 SPS, FSR = Full
Scale Range (Note 5)
Internal Reference Voltage
VREF
—2.048
—
V
Gain Error (Note 6)
—
0.05
0.35
%
PGA = 1, DR = 3.75 SPS
Note
1:
Any input voltage below or greater than this voltage causes leakage current through the ESD diodes at the input pins.
This parameter is ensured by characterization and not 100% tested.
2:
This input impedance is due to 3.2 pF internal input sampling capacitor.
3:
This parameter is ensured by design and not 100% tested.
4:
The total conversion speed includes auto-calibration of offset and gain.
5:
INL is the difference between the endpoints line and the measured code at the center of the quantization band.
6:
Includes all errors from on-board PGA and VREF.
7:
This parameter is ensured by characterization and not 100% tested.
8:
MCP3423 and MCP3424 only.
9:
Addr_Float voltage is applied at address pin.
10: No voltage is applied at address pin (left “floating”).
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