- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9443 > MCP4014T-503E/OT (Microchip Technology)IC DGTL POT 50K 1CH RHEO SOT23-5 PDF資料下載
參數(shù)資料
| 型號： | MCP4014T-503E/OT |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 38/54頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DGTL POT 50K 1CH RHEO SOT23-5 |
| 標準包裝： | 1 |
| 接片： | 64 |
| 電阻（歐姆）： | 50k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標準值 150 ppm/°C |
| 存儲器類型： | 易失 |
| 接口： | 2 線串行（芯片選擇，增/減） |
| 電源電壓： | 1.8 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SC-74A，SOT-753 |
| 供應商設備封裝： | SOT-23-5 |
| 包裝： | 標準包裝 |
| 產(chǎn)品目錄頁面： | 674 (CN2011-ZH PDF) |
| 其它名稱： | MCP4014T-503E/OTDKR |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁當前第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁
2006 Microchip Technology Inc.
DS21978C-page 43
MCP4011/2/3/4
7.0
DESIGN CONSIDERATIONS
In the design of a system with the MCP401X devices,
the following considerations should be taken into
account:
The Power Supply
The Layout
7.1
Power Supply Considerations
The typical application will require a bypass capacitor
in order to filter high-frequency noise, which can be
induced onto the power supply's traces. The bypass
capacitor helps to minimize the effect of these noise
sources on signal integrity. Figure 7-1 illustrates an
appropriate bypass strategy.
In this example, the recommended bypass capacitor
value is 0.1 F. This capacitor should be placed as
close (within 4 mm) to the device power pin (VDD) as
possible.
The power source supplying these devices should be
as clean as possible. If the application circuit has
separate digital and analog power supplies, VDD and
VSS should reside on the analog plane.
FIGURE 7-1:
Typical Microcontroller
Connections.
7.2
Layout Considerations
Inductively-coupled AC transients and digital switching
noise can degrade the input and output signal integrity,
potentially masking the MCP4011/2/3/4’s performance.
Careful board layout will minimize these effects and
increase the Signal-to-Noise Ratio (SNR). Bench
testing has shown that a multi-layer board utilizing a
low-inductance ground plane, isolated inputs, isolated
outputs and proper decoupling are critical to achieving
the performance that the silicon is capable of providing.
Particularly harsh environments may require shielding
of critical signals.
If low noise is desired, breadboards and wire-wrapped
boards are not recommended.
VDD
VSS
M
C
P4
01
1/
2/
3/
4
0.1 F
PIC
Mi
cr
oco
n
tr
ol
le
r
0.1 F
U/D
CS
W
B
A
相關PDF資料 |
PDF描述 |
|---|---|
| VE-B14-IU-F2 | CONVERTER MOD DC/DC 48V 200W |
| LTC6992MPS6-4#TRMPBF | IC OSC PWM VOLT CTLR TSOT23-6 |
| LTC6992MPS6-3#TRPBF | IC OSC PWM VOLT CTLR TSOT23-6 |
| VE-B12-IU-F3 | CONVERTER MOD DC/DC 15V 200W |
| LTC6992MPS6-3#TRMPBF | IC OSC PWM VOLT CTLR TSOT23-6 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MCP4017 | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:7-Bit Single I2C? Digital POT with Volatile Memory in SC70 |
| MCP4017-103E/LT | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:7-Bit Single I2C? Digital POT with Volatile Memory in SC70 |
| MCP4017-104E/LT | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:7-Bit Single I2C? Digital POT with Volatile Memory in SC70 |
| MCP4017-502E/LT | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:7-Bit Single I2C? Digital POT with Volatile Memory in SC70 |
| MCP4017-503E/LT | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:7-Bit Single I2C? Digital POT with Volatile Memory in SC70 |
發(fā)布緊急采購，3分鐘左右您將得到回復。