參數(shù)資料
型號： MCP4252T-503E/UN
廠商： Microchip Technology
文件頁數(shù)： 33/59頁
文件大?。?/td> 0K
描述： IC RHEOSTAT 50K 2CH 10-MSOP
標(biāo)準(zhǔn)包裝： 2,500
接片： 257
電阻（歐姆）： 50k
電路數(shù)： 2
溫度系數(shù)： 標(biāo)準(zhǔn)值 150 ppm/°C
存儲器類型： 易失
接口： 4 線 SPI（芯片選擇）
電源電壓： 1.8 V ~ 5.5 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 10-TFSOP，10-MSOP（0.118"，3.00mm 寬）
供應(yīng)商設(shè)備封裝： 10-MSOP
包裝： 帶卷 (TR)
其它名稱： MCP4252T-503-E/UN
MCP4252T-503-E/UNTR
MCP4252T-503-E/UNTR-ND
MCP4252T-503E/UNTR
Micrel, Inc.
KSZ8051MNL/RNL
July 2010
39
M9999-070910-1.0
Register Description (Continued)
Address
Name
Description
Mode
(1)
Default
Register 16h – Operation Mode Strap Override
16.15:11
Reserved
RW
0000_0
16.10
Reserved
RO
0
16.9
B-CAST_OFF
override
1 = Override strap-in for B-CAST_OFF
If bit is ‘1’, PHY Address 0 is non-broadcast.
RW
0
16.8
Reserved
RW
0
16.7
MII B-to-B
override
1 = Override strap-in for MII Back-to-Back
mode (set also bit 0 of this register to 1)
This bit is applicable for KSZ8051MNL only.
RW
0
16.6
RMII B-to-B
override
1 = Override strap-in for RMII Back-to-Back
mode (set also bit 1 of this register to 1)
This bit is applicable for KSZ8051RNL only.
RW
0
16.5
NAND Tree
override
1 = Override strap-in for NAND Tree mode
RW
0
16.4:2
Reserved
RW
000
16.1
RMII override
1 = Override strap-in for RMII mode
This bit is applicable for KSZ8051RNL only.
RW
0
16.0
MII override
1 = Override strap-in for MII mode
This bit is applicable for KSZ8051MNL only.
RW
1
Register 17h – Operation Mode Strap Status
17.15:13
PHYAD[2:0]
strap-in status
[000] = Strap to PHY Address 0
[001] = Strap to PHY Address 1
[010] = Strap to PHY Address 2
[011] = Strap to PHY Address 3
[100] = Strap to PHY Address 4
[101] = Strap to PHY Address 5
[110] = Strap to PHY Address 6
[111] = Strap to PHY Address 7
RO
17.12:10
Reserved
RO
17.9
B-CAST_OFF
strap-in status
1 = Strap to B-CAST_OFF
If bit is ‘1’, PHY Address 0 is non-broadcast.
RO
17.8
Reserved
RO
17.7
MII B-to-B
strap-in status
1 = Strap to MII Back-to-Back mode
This bit is applicable for KSZ8051MNL only.
RO
17.6
RMII B-to-B
strap-in status
1 = Strap to RMII Back-to-Back mode
This bit is applicable for KSZ8051RNL only.
RO
17.5
NAND Tree
strap-in status
1 = Strap to NAND Tree mode
RO
17.4:2
Reserved
RO
17.1
RMII
strap-in status
1 = Strap to RMII mode
This bit is applicable for KSZ8051RNL only.
RO
17.0
MII
strap-in status
1 = Strap to MII mode
This bit is applicable for KSZ8051MNL only.
RO
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