參數(shù)資料
型號: MCP4341T-103E/ML
廠商: Microchip Technology
文件頁數(shù): 29/59頁
文件大?。?/td> 0K
描述: IC DGTL POT QUAD 10K 20QFN
標(biāo)準(zhǔn)包裝: 3,300
系列: WiperLock™
接片: 129
電阻(歐姆): 10k
電路數(shù): 4
溫度系數(shù): 標(biāo)準(zhǔn)值 150 ppm/°C
存儲器類型: 非易失
接口: 4 線 SPI(芯片選擇)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 20-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 20-QFN 裸露焊盤(4x4)
包裝: 帶卷 (TR)
Micrel, Inc.
KSZ9021GQ
September 2010
35
M9999-091010-1.2
Register Number (Hex)
Description
27 (1Bh)
Interrupt Control/Status
28 (1Ch)
Digital Debug Control 1
29 (1Dh) – 30 (1Eh)
Reserved
31 (1Fh)
PHY Control
Extended Registers
257 (101h)
Strap Status
258 (102h)
Operation Mode Strap Override
259 (103h)
Operation Mode Strap Status
263 (107h)
Analog Test Register
Register Description
IEEE Defined Registers
Address
Name
Description
Mode
(1)
Default
Register 0 (0h) – Basic Control
0.15
Reset
1 = Software PHY reset
0 = Normal operation
This bit is self-cleared after a ‘1’ is written to it
RW/SC
0
0.14
Loop-back
1 = Loop-back mode
0 = Normal operation
RW
0
0.13
Speed Select
(LSB)
[0.6, 0.13]
[1,1] = Reserved
[1,0] = 1000Mbps
[0,1] = 100Mbps
[0,0] = 10Mbps
This bit is ignored if auto-negotiation is enabled
(register 0.12 = 1)
RW
Hardware Setting
0.12
Auto-
Negotiation
Enable
1 = Enable auto-negotiation process
0 = Disable auto-negotiation process
If enabled, auto-negotiation result overrides
settings in register 0.13, 0.8 and 0.6
RW
1
0.11
Power Down
1 = Power down mode
0 = Normal operation
RW
0
0.10
Isolate
1 = Electrical isolation of PHY from GMII/MII
0 = Normal operation
RW
0
0.9
Restart Auto-
Negotiation
1 = Restart auto-negotiation process
0 = Normal operation
This bit is self-cleared after a ‘1’ is written to it
RW/SC
0
0.8
Duplex Mode
1 = Full-duplex
0 = Half-duplex
RW
Hardware Setting
0.7
Collision Test
1 = Enable COL test
0 = Disable COL test
RW
0
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