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參數(shù)資料
型號： MCP4441-503E/ST
廠商： Microchip Technology
文件頁數(shù)： 65/100頁
文件大?。?/td> 0K
描述： IC DGTL POT 129TAPS QUAD 20TSSOP
標準包裝： 74
接片： 129
電阻（歐姆）： 50k
電路數(shù)： 4
溫度系數(shù)： 標準值 150 ppm/°C
存儲器類型： 非易失
接口： I²C（設(shè)備位址）
電源電壓： 2.7 V ~ 5.5 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 20-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 20-TSSOP
包裝： 管件
2010 Microchip Technology Inc.
DS22265A-page 67
MCP444X/446X
FIGURE 7-4:
I2C Read (Last Memory Address Accessed).
FIGURE 7-5:
I2C Random Read.
STOP bit
Control Byte
1
010
S
1 A1 A0 1 A
Fixed
Address
Variable
Address
Read bits
P
0
000
0
0 D8 A1
Read bit
D3
D7 D6 D5 D4
D2 D1 D0 A2
Read Data bits
Note 1:
Master Device is responsible for A / A signal. If a A signal occurs, the MCP44XX will abort this
transfer and release the bus.
2:
The Master Device will Not Acknowledge, and the MCP44XX will release the bus so the
Master Device can generate a Stop or Repeated Start condition.
3:
The MCP44XX retains the last “Device Memory Address” that it has received. This is the
MCP44XX does not “corrupt” the “Device Memory Address” after Repeated Start or Stop
conditions.
4:
The Device Memory Address pointer defaults to 00h on POR and BOR conditions.
STOP bit
Control Byte
READ Command
1
01 0
S
1 A1 A0 0
1
AD AD AD AD
A1 x X A Sr
0
1
2
3
Fixed
Address
Variable
Address
Device
Memory
Address
Command
Control Byte
Read bits
P
0
00 0
0
0 D8 A1
Write bit
D3
D7 D6 D5 D4
D2 D1 D0 A2
1
0 1 0
1 A1 A0 1
A
Read bit
Repeated Start bit
Read Data bits
Note 1:
Master Device is responsible for A / A signal. If a A signal occurs, the MCP44XX will abort this
transfer and release the bus.
2:
The Master Device will Not Acknowledge, and the MCP44XX will release the bus so the Mas-
ter Device can generate a Stop or Repeated Start condition.
3:
The MCP44XX retains the last “Device Memory Address” that it has received. This is the
MCP44XX does not “corrupt” the “Device Memory Address” after Repeated Start or Stop
conditions.
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