參數(shù)資料
型號： MCP451WB
廠商： Microchip Technology Inc.
英文描述： 400000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
中文描述： 13.56 MHz讀/寫無源RFID器件
文件頁數(shù)： 21/50頁
文件大?。?/td> 1172K
代理商： MCP451WB
2003 Microchip Technology Inc.
DS40232H-page 21
MCRF450/451/452/455
6.2.2
STRUCTURE OF DEVICE
RESPONSE
When the device receives the Interrogator command, it
responds with 70 kHz Manchester encoded data
having the following structures:
Device Response to FRR Command:
Preamble (8
bits) + TC (3 bits) + TP (4 bits) + ‘
0
’ + 32 bits of Tag ID
(Block 1 data) + FRF data (32 - 96 bits) + Calculated
CRC (SCRC, 16 bits) of Tag ID and FRF data = 96 - 160
bits depending on FRF data length.
Note:
The preamble + TC + TP + ‘
0
’ are not included
for the CRC calculation.
Device Response to FRB Command:
Preamble (8
bits) + ‘
00001
’ + ‘
000
’ + 32 bits of Tag ID (Block 1 data)
+ Stored CRC (SCRC, 16 bits) of Block 1 = 64 bits.
Device Response of Interrogator’s Read command
for Blocks 0 and 2:
Preamble (8 bits) + Block Number (5 bits) + ‘
000
’ +
Block Data (32 bits) + Calculated 16 bit CRC (CCRC).
Note:
The CCRC is calculated by using block number
and block data only. Preamble and ‘
000
’ are not
included in the CRC calculation.
Device Response of Interrogator’s Read Command
for all other blocks:
Device Response = Preamble (8 bits) + Block Number
(5 bits) + ‘
000
’ + Block Data (32 bits) + Stored CRC
(SCRC, 16 bits) in the same block.
TABLE 6-3:
INTERROGATOR COMMANDS AND DEVICE RESPONSES
Interrogator Command
Delay
Device Response
Read Block 0 and Block 2
data
T
DECODE
Preamble, block #, ‘
000
’, block data, CCRC
Read block data except for
Block 0 and Block 2
T
DECODE
Preamble, block #, ‘
000
’, block data, SCRC
Write block data
T
WRITE
For Blocks 0 and 2: Preamble, block #, ‘
000
’, block data, CCRC
For all others: Preamble, block #, ‘
000
’, block data, SCRC
Set Fast Read (FR) bit
T
WRITE
Preamble, 1 byte ‘
0
’s, Block 0 data, CCRC
Clear Fast Read (FR) bit
T
WRITE
Preamble, 1 byte ‘
0
’s, Block 0 data, CCRC
Set Talk First (TF) bit
T
WRITE
Preamble, 1 byte ‘
0
’s, Block 0 data, CCRC
Clear Talk First (TF) bit
T
WRITE
Preamble, 1 byte ‘
0
’s, Block 0 data, CCRC
End Process (EP)
T
DECODE
Preamble
FRR
f(TSMAX, TCMAX, 8-bit Tag ID) Preamble,TC, TP, ‘
0
’, Tag ID, FRF, FRR_CCRC
FRB
T
DECODE
Preamble, address of block #1 (‘
00001
’), ‘
000
’, Tag ID (32 bits),
SCRC of Block 1
References used in this table are as follows:
Preamble =
11111110
(8 bits).‘
0
’ is transmitted last.
Block # = 5 bit addressed block, transmits Least Significant bit (LSb) first.
Block data = 32-bit data of the addressed block, transmits LSb first.
CCRC = Calculated CRC of the preceding block number and block data. Transmits LSb first.
SCRC = Stored CRC. This SCRC is the CRC of the Write command, address, and data from the Interrogator, LSb first. The device
stores the received CRC for each block. See
Section 7.2 “Stored CRC (SCRC) Memory Section”
for details.
FRR_CRC = Calculated CRC of 32-bit Tag ID and fast read field (FRF) data.
TP = Tag parameters (4 bits: ‘
0
’, DF0, DF1, parity). where DF0 and DF1 determine the FR field length (see Table 7-6).
TC = Transmission counter (3 bits), transmits LSb first.
Parity = Even parity bit of TC and TP.
Tag ID = 32 bits of unique identification code of the device, transmits LSb first. This Tag ID is preprogrammed in the factory prior to
shipping.
8-bit Tag ID = 8 bits of Tag ID selected from the 32 bits of the unique tag identification code. Transmits LSb first (see
Section 6.2.3.6
“Calculation Of Matching Code”
for selecting the 8 bits from the Tag ID).
FRF = Fast Read Field (Blocks 3-5), transmits LSb first (see
Section 7.0 “Memory Section”
).
f(TSMAX, TCMAX, 8-bit Tag ID = Delay is a function of the TSMAX, TCMAX and 8-bit Tag ID.
T
WRITE
= Writing time for EEPROM (see Table 2-3).
T
DECODE
= Time requirement for command decoding (see Table 2-3).
Examples are given in
Section 9.0 “Examples”
.
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