參數(shù)資料
型號(hào)： MCP452W
廠商： Microchip Technology Inc.
英文描述： 400000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
中文描述： 13.56 MHz讀/寫(xiě)無(wú)源RFID器件
文件頁(yè)數(shù)： 34/50頁(yè)
文件大小： 1172K
代理商： MCP452W
MCRF450/451/452/455
DS40232H-page 34
2003 Microchip Technology Inc.
TABLE 7-7:
MT BITS (B0:25 - B0:24)
TABLE 7-8:
TM BITS (B0:23 - B0:21)
TABLE 7-9:
B0: (20-0)
7.3.2
BLOCK 1: UNIQUE 32-BIT TAG ID
Block 1 contains 32 bits of unique Tag ID with SCRC.
The ID is uniquely serialized by Microchip Technology
Inc.
7.3.3
BLOCK 2: WRITE-PROTECT FOR
THE FIRST KBITS
Each bit corresponds to a 32-bit block, (i.e., bit ‘
0
’ to
Block 0, bit ‘
1
’ to Block 1, etc.). Program the
corresponding bit to ‘
0
’ to write-protect the block. For
example, program bit 10 to ‘
0
’ to write-protect the Block
10. The initial value (default) of Block 2 is ‘
FFFFFFFD
’.
This means Block 1 (Tag ID) is write-protected before
shipping to customer.
Write protection is a one way process, (i.e., once a
block is write-protected, it cannot be modified). It
should be noted that the write-protect block itself can
be write-protected. TF and FR bits in Block 0 are not
write-protectable, even if the write protection bit in the
block is set.
TABLE 7-10:
WRITE-PROTECT
7.3.4
BLOCKS 3 - 5: FAST READ FIELDS
These blocks contain data bits for the FR response.
The state of the DF bits (see Table 7-6) in Block 0
determines the actual number of bits to be sent. This
block can be used both as a customer ID and as
additional tag ID numbers. These blocks are called
Fast Read Field (FRF) because the device sends the
FRF data immediately following the FRR command
only (ITF mode), or as soon as energized (TTF mode),
without an additional Block Read command. This
means that the reading of this FRF data can be done
by FRR command only. Reading of other block data
requires the FRR and Block Read commands. Only the
FRR device (FR bit = set) outputs the FRF data. The
FRB device (FR bit = cleared) does not send the FRF
data.
MT1
MT0
Memory Type
0
0
Single level EEPROM (Default).
0
1
Reserved for future uses
(e.g., multi level EEPROM).
1
0
Reserved for future uses.
1
1
Reserved for future uses.
Note:
The MT bits are “hardwired”.
TM2
TM1
TM0
Total Memory Size
0
0
0
512 bits
0
0
1
1 Kbit (Default)
0
1
0
TBD
0
1
1
TBD
1
0
0
TBD
1
0
1
TBD
1
1
0
TBD
1
1
1
TBD
Note:
The TM bits are “hardwired”.
B0:(20-0)
Available for user
Block X Write Status
Bit X of Write-Protect
Block
Block X writable
1
Block X write-protected
0
相關(guān)PDF資料
PDF描述
MCP452WB 13.56 MHz Read/Write Passive RFID Device
MCP452WF 13.56 MHz Read/Write Passive RFID Device
MCP452X 400000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
MCP455 400000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
MCP455P 13.56 MHz Read/Write Passive RFID Device
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