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參數(shù)資料
| 型號： | MCP4812-E/MS |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 11/19頁 |
| 文件大?。?/td> | 0K |
| 描述： | DAC 10BIT DUAL SPI/VREF 8MSOP |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 設(shè)置時間： | 4.5µs |
| 位數(shù)： | 10 |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-MSOP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 2 電壓，單極；2 電壓，雙極 |
| 采樣率（每秒）： | * |
| 產(chǎn)品目錄頁面： | 673 (CN2011-ZH PDF) |
2011-2012 Microchip Technology Inc.
Preliminary
DS22280C-page 29
MCP795W1X/MCP795W2X
In the case where the MSB of the Calibration register
is set to ‘1’, the CLKOUT output waveforms that
appear when bits RS1 and RS0 are set to ‘01’ or ‘10’
are not as responsive to the setting of the Calibration
register. For example, when outputting the 4.096 kHz
waveform (RS1, RS0 set to ‘01’), the output waveform
is generated using only eight input clock cycles.
Consequently, attempting to subtract more than eight
input clock cycles from this output does not have a
meaningful affect on the resulting waveform. Any
affect on the output will appear as a modification in
both the frequency and duty cycle of the waveform
appearing on the CLKOUT output pin.
Method 2. RS2 bit set to ‘1’
With the RS2 bit set to ‘1’, the following internal timing
signal is output on the CLKOUT pin:
The frequency listed in the table presumes an input
clock source of exactly 32.768 kHz. In terms of the
equivalent number of input clock cycles, the table
becomes:
Unlike
the
method
previously
described,
the
calibration setting is continuously applied and affects
every cycle of the output waveform. This results in the
modulation of the frequency of the output waveform
based upon the setting of the Calibration register.
Using this setting, the calibration function can be
expressed as:
Since the calibration is done every cycle, the frequency
of the output CLKOUT waveform is constant.
FIGURE 9-1:
CLKOUT WAVEFORM
RS2
RS1
RS0
Output Signal
1x
x
1.0 Hz
RS2
RS1
RS0
Output Signal
1x
x
32768
Toutput
=
(32768 +/- (2 * CALREG)) Tinput
where:
Toutput
=
clock period of CLKOUT output
signal
Tinput
=
clock period of input signal
CALREG
=
decimal value of Calibration
register setting and the sign is
determined by the CALSGN bit.
Delay
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