2009 Microchip Technology Inc.
DS11177F-page 9
MCP606/7/8/9
Note: Unless otherwise indicated, V
DD = +2.5V to +5.5V, VSS = GND, TA =+25°C, VCM =VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL, CL = 60 pF, and CS is tied low.
FIGURE 2-13:
Input Bias Current, Input
Offset Current vs. Ambient Temperature.
FIGURE 2-14:
DC Open-Loop Gain vs.
Load Resistance.
FIGURE 2-15:
CMRR, PSRR vs.
Frequency.
FIGURE 2-16:
Input Bias Current, Input
Offset Current vs. Common Mode Input Voltage.
FIGURE 2-17:
DC Open-Loop Gain vs.
Power Supply Voltage.
FIGURE 2-18:
CMRR, PSRR vs. Ambient
Temperature.
0.1
1
10
100
25 30 35 40 45 50 55 60 65 70 75 80 85
Ambient Temperature (°C)
Input
Bias
and
Of
fset
Curre
nt
s
(p
A
)
IB
| IOS |
VDD = 5.5V
VCM = VDD
100
105
110
115
120
125
130
135
1.E+02
1.E+03
1.E+04
1.E+05
Load Resistance ()
DC
Open
-Loop
Gain
(
d
B)
VDD = 2.5V
VDD = 5.5V
100
100k
10k
1k
0
20
40
60
80
100
120
1.E-01
1.E+00
1.E+01
1.E+02
1.E+03
1.E+04
Frequency (Hz)
CMRR
and
PSRR
(
d
B
)
PSRR-
PSRR+
CMRR
0.1
1
10
100
1k
10k
-10
0
10
20
30
40
50
60
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Common Mode Input Voltage (V)
In
put
Bias
and
Off
set
Currents
(pA)
IB
IOS
TA = 85°C
VDD = 5.5V
90
100
110
120
130
140
150
0.00.5 1.01.5 2.02.5 3.03.5 4.04.5 5.05.5
Power Supply Voltage (V)
DC
Open-
Loop
Gain
(dB)
RL = 25 k
75
80
85
90
95
100
-50
-25
0
25
50
75
100
Ambient Temperature (°C)
CMRR
and
PSRR
(
d
B
)
CMRR
PSRR