MCP606/7/8/9
DS11177F-page 8
2009 Microchip Technology Inc.
Note: Unless otherwise indicated, V
DD = +2.5V to +5.5V, VSS = GND, TA =+25°C, VCM =VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL, CL = 60 pF, and CS is tied low.
FIGURE 2-7:
Input Offset Voltage vs.
Ambient Temperature.
FIGURE 2-8:
Open-Loop Gain and Phase
vs. Frequency.
FIGURE 2-9:
Channel-to-Channel
Separation (MCP607 and MCP609 only).
FIGURE 2-10:
Input Offset Voltage vs.
Common Mode Input Voltage.
FIGURE 2-11:
Gain Bandwidth Product,
Phase Margin vs. Ambient Temperature.
FIGURE 2-12:
Input Noise Voltage Density
vs. Frequency.
0
100
200
300
400
500
-50
-25
0
255075
100
Ambient Temperature (°C)
Input
Of
fset
V
o
lt
age
(V)
VDD =2.5V
VDD = 5.5V
Representative Part
-20
0
20
40
60
80
100
120
Frequency (Hz)
Open-Loop
Gain
(dB)
-225
-180
-135
-90
-45
0
45
90
Open-Loop
Phase
(°
)
Gain
Phase
RL = 25 k
0.01
1
0.1
10
1k
100
10k
1M
100k
80
90
100
110
120
130
140
1.E+02
1.E+03
1.E+04
1.E+05
Frequency (Hz)
Channel
t
o
Channel
Se
p
a
ra
tio
n
(d
B
)
Referred to Input
100
100k
10k
1k
-20
0
20
40
60
80
100
120
-0
.5
0.
0
0.
5
1.
0
1.
5
2.
0
2.
5
3.
0
3.
5
4.
0
4.
5
5.
0
Common Mode Input Voltage (V)
Input
Off
s
et
V
o
lt
age
(V
)
TA = +85°C
TA = +25°C
TA = -40°C
VDD = 5.5V
0
20
40
60
80
100
120
140
160
-50
-25
0
25
50
75
100
Ambient Temperature (°C)
Gain
Bandwidth
Product
(k
Hz)
0
10
20
30
40
50
60
70
80
P
h
as
eM
a
rgin
(
°)
Phase Margin
GBWP
VDD = 5.0V
10
100
1000
1.E-01 1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05
Frequency (Hz)
Input
Noise
V
o
lt
age
Density
(nV/
√Hz)
0.1
1
10
100
1k
10k
100k