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參數(shù)資料
| 型號： | MCP6282 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 450 UA, 5 MHz Rail-to-Rail Op Amp |
| 中文描述： | 450聯(lián)合航空表示，5兆赫軌到軌運算放大器 |
| 文件頁數(shù)： | 12/32頁 |
| 文件大?。?/td> | 580K |
| 代理商： | MCP6282 |
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MCP6281/2/3/4/5
DS21811D-page 12
2004 Microchip Technology Inc.
FIGURE 4-4:
for Capacitive Loads.
Recommended R
ISO
Values
After selecting R
ISO
for your circuit, double-check the
resulting frequency response peaking and step
response overshoot. Modify R
ISO
's value until the
response is reasonable. Bench evaluation and simula-
tions with the MCP6281/2/3/4/5 SPICE macro model
are helpful.
4.4
MCP628X Chip Select (CS)
The MCP6283 and MCP6285 are single and dual op
amps with Chip Select (CS), respectively. When CS is
pulled high, the supply current drops to 0.7 μA (typ) and
flows through the CS pin to V
SS
. When this happens,
the amplifier output is put into a high-impedance state.
By pulling CS low, the amplifier is enabled. If the CS pin
is left floating, the amplifier may not operate properly.
Figure 1-1 shows the output voltage and supply current
response to a CS pulse.
4.5
Cascaded Dual Op Amps
(MCP6285)
The MCP6285 is a dual op amp with Chip Select (CS).
The Chip Select input is available on what would be the
non-inverting input of a standard dual op amp (pin 5).
This pin is available because the output of op amp A
connects to the non-inverting input of op amp B, as
shown in Figure 4-5. The Chip Select input, which can
be connected to a microcontroller I/O line, puts the
device in Low-power mode. Refer to
Section 4.4
“MCP6283/5 Chip Select (CS)”
.
FIGURE 4-5:
Cascaded Gain Amplifier.
The output of op amp A is loaded by the input imped-
ance of op amp B, which is typically 10
13
||6 pF, as
specified in the DC specification table (Refer to
Section 4.3 “Capacitive Loads”
for further details
regarding capacitive loads).
The common mode input range of these op amps is
specified in the data sheet as V
SS
– 300 mV and
V
DD
+ 300 mV. However, since the output of op amp A
is limited to V
OL
and V
OH
(20 mV from the rails with a
10 k
load), the non-inverting input range of op amp B
is limited to the common mode input range of
V
SS
+ 20 mV and V
DD
– 20 mV.
4.6
Supply Bypass
With this family of operational amplifiers, the power
supply pin (V
DD
for single-supply) should have a local
bypass capacitor (i.e., 0.01 μF to 0.1 μF) within 2 mm
for good, high-frequency performance. It also needs a
bulk capacitor (i.e., 1 μF or larger) within 100 mm to
provide large, slow currents. This bulk capacitor can be
shared with other analog parts.
4.7
PCB Surface Leakage
In applications where low input bias current is critical,
Printed Circuit Board (PCB) surface-leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 10
12
. A 5V difference would
cause 5 pA of current to flow, which is greater than the
MCP6281/2/3/4/5 family’s bias current at 25°C (1 pA,
typ.).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 4-6.
10
100
1,000
10
100
1,000
10,000
Normalized Load Capacitance; C
L
/G
N
(pF)
R
I
G
N
= 1 V/V
G
N
= 2 V/V
G
N
≥
4 V/V
A
B
CS
2
3
5
6
7
V
INA
+
V
OUTB
MCP6285
1
V
INA
–
V
OUTA
/V
INB
+
V
INB
–
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| MCP6282-E/P | 功能描述:運算放大器 - 運放 Dual 5MHz RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
| MCP6282-E/SN | 功能描述:運算放大器 - 運放 Dual 5MHz RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
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