Note: Unless otherwise indicat" />
參數(shù)資料
型號(hào): MCP651ST-E/OT
廠商: Microchip Technology
文件頁(yè)數(shù): 66/66頁(yè)
文件大小: 0K
描述: IC OPAMP GP RRO 50MHZ SOT23-5
標(biāo)準(zhǔn)包裝: 1
系列: mCal 技術(shù)
放大器類(lèi)型: 通用
電路數(shù): 1
輸出類(lèi)型: 滿擺幅
轉(zhuǎn)換速率: 30 V/µs
增益帶寬積: 50MHz
電流 - 輸入偏壓: 6pA
電壓 - 輸入偏移: 200µV
電流 - 電源: 6mA
電流 - 輸出 / 通道: 100mA
電壓 - 電源,單路/雙路(±): 2.5 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: SC-74A,SOT-753
供應(yīng)商設(shè)備封裝: SOT-23-5
包裝: 標(biāo)準(zhǔn)包裝
其它名稱(chēng): MCP651ST-E/OTDKR
2009-2011 Microchip Technology Inc.
DS22146C-page 9
MCP651/1S/2/3/4/5/9
2.0
TYPICAL PERFORMANCE CURVES
Note: Unless otherwise indicated, TA =+25°C, VDD = +2.5V to 5.5V, VSS = GND, VCM =VDD/3, VOUT =VDD/2,
VL =VDD/2, RL =1 kto VL, CL = 20 pF, and CAL/CS =VSS.
2.1
DC Signal Inputs
FIGURE 2-1:
Input Offset Voltage.
FIGURE 2-2:
Input Offset Voltage Drift.
FIGURE 2-3:
Input Offset Voltage
Repeatability (repeated calibration).
FIGURE 2-4:
Input Offset Voltage vs.
Power Supply Voltage.
FIGURE 2-5:
Input Offset Voltage vs.
Output Voltage.
FIGURE 2-6:
Low Input Common Mode
Voltage Headroom vs. Ambient Temperature.
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
0%
5%
10%
15%
20%
25%
30%
35%
-100 -80 -60 -40 -20
0
20406080 100
Input Offset Voltage (V)
P
er
cent
age
o
fO
ccur
re
nces
80 Samples
TA = +25°C
VDD = 2.5V and 5.5V
Calibrated at +25°C
0%
2%
4%
6%
8%
10%
12%
14%
16%
18%
20%
-10 -8-6-4-2
0
2
4
6
8
10
Input Offset Voltage Drift (V/°C)
P
er
cen
tage
of
Occu
rr
enc
es
80 Samples
VDD = 2.5V and 5.5V
TA = -40°C to +125°C
Calibrated at +25°C
0%
5%
10%
15%
20%
25%
30%
35%
40%
45%
50%
55%
-100 -80 -60 -40 -20
0
20
40
60
80 100
Input Offset Voltage Repeatability (V)
P
e
rc
e
n
tag
eo
fOc
cur
ren
ces
80 Samples
TA = +25°C
VDD = 2.5V and 5.5V
Calibration
Changed
Calibration
Changed
No Change
(includes noise)
-100
0
100
200
300
400
500
600
700
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
Power Supply Voltage (V)
Inp
u
t
Off
set
V
o
lt
ag
e(
V
)
+125°C
+85°C
+25°C
-40°C
Representative Part
Calibrated at VDD = 6.5V
-50
-40
-30
-20
-10
0
10
20
30
40
50
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Output Voltage (V)
Inpu
tO
ffs
et
V
o
lt
age
(
V
)
VDD = 2.5V
VDD = 5.5V
Representative Part
-0.5
-0.4
-0.3
-0.2
-0.1
0.0
-50
-25
0
25
50
75
100
125
Ambient Temperature (°C)
L
o
w
I
npu
tC
o
m
o
n
M
ode
H
eadr
o
m
(
V
)
VDD = 2.5V
1 Lot
Low (VCMR_L – VSS)
VDD = 5.5V
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