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參數(shù)資料
型號： MCP654T-E/ST
廠商： Microchip Technology
文件頁數(shù)： 21/66頁
文件大?。?/td> 0K
描述： IC OP AMP 50MHZ RRIO 14TSSOP
標(biāo)準(zhǔn)包裝： 2,500
系列： mCal 技術(shù)
放大器類型： 通用
電路數(shù)： 4
輸出類型： 滿擺幅
轉(zhuǎn)換速率： 30 V/µs
增益帶寬積： 50MHz
電流 - 輸入偏壓： 6pA
電壓 - 輸入偏移： 200µV
電流 - 電源： 6mA
電流 - 輸出 / 通道： 150mA
電壓 - 電源，單路/雙路(±)： 2.5 V ~ 5.5 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 14-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 14-TSSOP
包裝： 帶卷 (TR)
MCP651/1S/2/3/4/5/9
DS22146C-page 28
2009-2011 Microchip Technology Inc.
FIGURE 4-11:
Amplifier with Parasitic
Capacitance.
CG acts in parallel with RG (except for a gain of +1 V/V),
which causes an increase in gain at high frequencies.
CG also reduces the phase margin of the feedback
loop, which becomes less stable. This effect can be
reduced by either reducing CG or RF.
CN and RN form a low-pass filter that affects the signal
at VP. This filter has a single real pole at 1/(2RNCN).
The largest value of RF that should be used depends
on noise gain (see GN in Section 4.4.1 “Capacitive
Loads”) and CG. Figure 4-12 shows the maximum
recommended RF for several CG values.
FIGURE 4-12:
Maximum Recommended
RF vs. Gain.
Figure 2-37 and Figure 2-38 show the small signal and
large signal step responses at G = +1 V/V. The unity
gain buffer usually has RF =0 and RG open.
Figure 2-39 and Figure 2-40 show the small signal and
large signal step responses at G = -1 V/V. Since the
noise gain is 2 V/V and CG 10 pF, the resistors were
chosen to be RF =RG =499 and RN = 249.
It is also possible to add a capacitor (CF) in parallel with
RF to compensate for the de-stabilizing effect of CG.
This makes it possible to use larger values of RF. The
conditions
for
stability
are
summarized
in
EQUATION 4-10:
4.5
Power Supply
With this family of operational amplifiers, the power
supply pin (VDD for single supply) should have a local
bypass capacitor (i.e., 0.01 F to 0.1 F) within 2 mm
for good high-frequency performance. Surface mount,
multilayer ceramic capacitors, or their equivalent,
should be used.
These op amps require a bulk capacitor (i.e., 2.2 F or
larger) within 50 mm to provide large, slow currents.
Tantalum capacitors, or their equivalent, may be a good
choice. This bulk capacitor can be shared with other
nearby analog parts as long as crosstalk through the
supplies does not prove to be a problem.
4.6
High Speed PCB Layout
These op amps are fast enough that a little extra care
in the PCB (Printed Circuit Board) layout can make a
significant difference in performance. Good PC board
layout
techniques
will
help
you
achieve
the
performance shown in the specifications and Typical
Performance Curves; it will also help you minimize
EMC (Electro-Magnetic Compatibility) issues.
Use a solid ground plane. Connect the bypass local
capacitor(s) to this plane with minimal length traces.
This cuts down inductive and capacitive crosstalk.
Separate digital from analog, low speed from high
speed, and low power from high power. This will reduce
interference.
Keep sensitive traces short and straight. Separate
them from interfering components and traces. This is
especially important for high frequency (low rise time)
signals.
Sometimes, it helps to place guard traces next to victim
traces. They should be on both sides of the victim
trace, and as close as possible. Connect guard traces
to ground plane at both ends, and in the middle for long
traces.
Use coax cables, or low inductance wiring, to route
signal and power to and from the PCB. Mutual and self
inductance of power wires is often a cause of crosstalk
and unusual behavior.
VP
RF
VOUT
MCP65X
RN
CN
VM
RG
CG
1.E+02
1.E+03
1.E+04
1.E+05
1
10
100
Noise Gain; GN (V/V)
M
a
xi
m
u
m
R
eco
m
e
n
d
ed
R
F
(
)
GN > +1 V/V
100
10k
100k
1k
CG = 10 pF
CG = 32 pF
CG = 100 pF
CG = 320 pF
CG = 1 nF
f
F
f
GBWP
2G
N2
, G
N1
G
N2
<
We need:
G
N1
1R
F RG
+
=
G
N2
1C
G CF
+
=
f
F
12
R
FCF
=
f
Z
f
F GN1 GN 2
=
Given:
f
F
f
GBWP
4G
N1
, G
N1
G
N2
>
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