參數(shù)資料
型號(hào): MCP6V31UT-E/LT
廠商: Microchip Technology
文件頁(yè)數(shù): 37/40頁(yè)
文件大?。?/td> 0K
描述: IC OPAMP SGL ZERO DRIFT SC70-5
標(biāo)準(zhǔn)包裝: 1
放大器類型: 零漂移
電路數(shù): 1
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 0.13 V/µs
增益帶寬積: 300kHz
電流 - 輸入偏壓: 5pA
電壓 - 輸入偏移: 8µV
電流 - 電源: 23µA
電流 - 輸出 / 通道: 21mA
電壓 - 電源,單路/雙路(±): 1.8 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 6-TSSOP(5 引線),SC-88A,SOT-353
供應(yīng)商設(shè)備封裝: SC-70-5
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: MCP6V31UT-E/LTDKR
MCP6V31/1U
DS25127A-page 6
2012 Microchip Technology Inc.
1.3
Timing Diagrams
FIGURE 1-1:
Amplifier Start Up.
FIGURE 1-2:
Offset Correction Settling
Time.
FIGURE 1-3:
Output Overdrive Recovery.
1.4
Test Circuits
The circuits used for most DC and AC tests are shown
in Figure 1-4 and Figure 1-5. Lay the bypass capacitors
and Filtering. RN is equal to the parallel combination of
RF and RG to minimize bias current effects.
FIGURE 1-4:
AC and DC Test Circuit for
Most Non-Inverting Gain Conditions.
FIGURE 1-5:
AC and DC Test Circuit for
Most Inverting Gain Conditions.
The circuit in Figure 1-6 tests the input’s dynamic
behavior (i.e., IMD, tSTR, tSTL and tODR). The
potentiometer balances the resistor network (VOUT
should equal VREF at DC). The op amp’s common
mode input voltage is VCM =VIN/2. The error at the
input (VERR) appears at VOUT with a noise gain of
10 V/V.
FIGURE 1-6:
Test Circuit for Dynamic
Input Behavior.
VDD
VOUT
1.001(VDD/3)
0.999(VDD/3)
tSTR
0V
1.8V to 5.5V
1.8V
VIN
VOS
VOS +100 V
VOS –100 V
tSTL
VIN
VOUT
VDD
VSS
tODR
VDD/2
VDD
RG
RF
RN
VOUT
VIN
VDD/3
1F
CL
RL
VL
100 nF
RISO
MCP6V3X
VDD
RG
RF
RN
VOUT
VDD/3
VIN
1F
CL
RL
VL
100 nF
RISO
MCP6V3X
VDD
VOUT
1F
CL
VL
RISO
11.0 k
249
11.0 k
500
VIN
VREF =VDD/3
0.1%
25 turn
100 k
0.1%
RL
0
20 pF
open
100 nF
1%
MCP6V3X
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