參數(shù)資料
型號: MCP79401-I/MNY
元件分類: 時鐘/數(shù)據(jù)恢復(fù)及定時提取
英文描述: REAL TIME CLOCK, PDSO8
封裝: 2 X 3 MM, 0.75 MM WIDTH, ROHS COMPLIANT, PLASTIC, TDFN-8
文件頁數(shù): 11/40頁
文件大小: 817K
代理商: MCP79401-I/MNY
2011 Microchip Technology Inc.
DS25009B-page 19
MCP7940X
5.2
ID
5.2.1
ID BYTE WRITE
Following the Start condition from the master, the
control code and the R/W bit (which is a logic low) are
clocked onto the bus by the master transmitter. This
indicates to the addressed slave receiver that a byte
with a word address will follow after it has generated an
Acknowledge bit during the ninth clock cycle.
Therefore, the next byte transmitted by the master is
the word address and will be written into the Address
Pointer of the MCP7940X. After receiving another
Acknowledge signal from the MCP7940X, the master
device transmits the data word to be written into the
addressed
memory
location.
The
MCP7940X
acknowledges again and the master generates a Stop
condition. This initiates the internal write cycle, and,
during this time, the MCP7940X does not generate
Acknowledge signals for Unique ID Write commands. If
an attempt is made to write to an address and the
protection is set then the device will acknowledge the
command but no write cycle will occur, no data will be
written, and the device will immediately accept a new
command. After a Byte Write command, the internal
address counter will point to the address location
following the one that was just written.
Note:
Addressing undefined ID locations will
result in the MCP7940X not acknowledg-
ing the address.
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