參數(shù)資料
型號(hào)： MCP7940N-I/SN
元件分類： 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述： REAL TIME CLOCK, PDSO8
封裝： 3.90 MM, ROHS COMPLIANT, PLASTIC, SOIC-8
文件頁(yè)數(shù)： 6/36頁(yè)
文件大?。?/td> 551K
代理商： MCP7940N-I/SN
MCP7940N
DS25010A-page 14
2011 Microchip Technology Inc.
5.0
ON BOARD MEMORY
The MCP7940N has battery-backed SRAM. The
SRAM is arranged as 64 x 8 bytes and is retained when
the VCC supply is removed, provided the VBAT supply
is present and enabled.
5.1
SRAM
FIGURE 5-1:
SRAM/RTCC BYTE WRITE
FIGURE 5-2:
SRAM/RTCC MULTIPLE BYTE WRITE
The 64 bytes of user SRAM are at location 0x20h and
can be accessed during an RTCC update. Upon POR
the SRAM will be in an undefined state.
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
S
T
A
R
T
CONTROL
BYTE
ADDRESS
BYTE
DATA
S
T
O
P
A
C
K
A
C
K
A
C
K
S 110 1
0
1 11
P
x
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
S
T
A
R
T
CONTROL
BYTE
ADDRESS
BYTE
DATA BYTE 0
S
T
O
P
A
C
K
A
C
K
A
C
K
DATA BYTE N
A
C
K
S 1 101
0
111
P
x
Note:
Entering an address past 5F for an SRAM
operation will result in the MCP7940N not
acknowledging the address.
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MCP7940N-I/MS REAL TIME CLOCK, PDSO8
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相關(guān)代理商/技術(shù)參數(shù)
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