參數(shù)資料
型號: MCP795W10T-I/SL
廠商: Microchip Technology
文件頁數(shù): 5/13頁
文件大小: 0K
描述: IC RTCC 1KB EE WD/EVENT 14SOIC
標(biāo)準(zhǔn)包裝: 2,600
類型: 時(shí)鐘/日歷
特點(diǎn): 警報(bào),EEPROM,閏年,方波輸出,SRAM,看門狗定時(shí)器
存儲(chǔ)容量: 64B
時(shí)間格式: HH:MM:SS:hh(12/24 小時(shí))
數(shù)據(jù)格式: YY-MM-DD-dd
接口: SPI
電源電壓: 1.8 V ~ 5.5 V
電壓 - 電源,電池: 1.3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 14-SOIC
包裝: 帶卷 (TR)
MCP4902/4912/4922
DS22250A-page 28
2010 Microchip Technology Inc.
6.4
Single-Supply Operation
The MCP4902/4912/4922 family of devices are rail-to-
rail voltage output DAC devices designed to operate
with a VDD range of 2.7V to 5.5V. Its output amplifier is
robust enough to drive small-signal loads directly.
Therefore, it does not require any external output buffer
for most applications.
6.4.1
DC SET POINT OR CALIBRATION
A common application for the DAC devices is
digitally-controlled set points and/or calibration of
variable parameters, such as sensor offset or slope.
For example, the MCP4922 provides 4096 output
steps. If the external voltage reference (VREF) is
4.096V, the LSb size is 1 mV. If a smaller output step
size is desired, a lower external voltage reference is
needed.
6.4.1.1
Decreasing Output Step Size
If the application is calibrating the bias voltage of a
diode or transistor, a bias voltage range of 0.8V may be
desired with about 200 V resolution per step. Two
common methods to achieve a 0.8V range is to either
reduce VREF to 0.82V or use a voltage divider on the
DAC’s output.
Using a VREF is an option if the VREF is available with
the
desired
output
voltage
range.
However,
occasionally, when using a low-voltage VREF, the noise
floor causes SNR error that is intolerable. Using a
voltage divider method is another option and provides
some advantages when VREF needs to be very low or
when the desired output voltage is not available. In this
case, a larger value VREF is used while two resistors
scale the output range down to the precise desired
level.
Example 6-1 illustrates this concept. Note that the
bypass capacitor on the output of the voltage divider
plays a critical function in attenuating the output noise
of the DAC and the induced noise from the
environment.
EXAMPLE 6-1:
EXAMPLE CIRCUIT OF SET POINT OR THRESHOLD CALIBRATION
VDD
SPI
3-wire
VTRIP
R1
R2
0.1 uF
Comparator
G = Gain selection (1x or 2x)
Dn = Digital value of DAC (0-255) for MCP4901/MCP4902
VOUT
VREF G
Dn
2
N
------
=
VCC+
VCC
VOUT
Vtrip
VOUT
R2
R1 R2
+
--------------------
=
VDD
RSENSE
DAC
= Digital value of DAC (0-1023) for MCP4911/MCP4912
= Digital value of DAC (0-4095) for MCP4921/MCP4922
N = DAC Bit Resolution
VREF
VO
MCP4901
MCP4911
MCP4921
(a) Single Output DAC:
(b) Dual Output DAC:
MCP4902
MCP4912
MCP4922
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