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參數(shù)資料
型號(hào): MCP795W12-I/SL
廠商: Microchip Technology
文件頁(yè)數(shù): 9/13頁(yè)
文件大?。?/td> 0K
描述: IC RTCC 64B SRAM WD/DET 14SOIC
標(biāo)準(zhǔn)包裝: 57
類型: 時(shí)鐘/日歷
特點(diǎn): 警報(bào),EEPROM,閏年,方波輸出,SRAM,唯一 ID,看門(mén)狗定時(shí)器
存儲(chǔ)容量: 64B
時(shí)間格式: HH:MM:SS:hh(12/24 小時(shí))
數(shù)據(jù)格式: YY-MM-DD-dd
接口: SPI
電源電壓: 1.8 V ~ 5.5 V
電壓 - 電源,電池: 1.3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 14-SOIC
包裝: 管件
MCP795W1X/MCP795W2X
DS22280C-page 4
Preliminary
2011-2012 Microchip Technology Inc.
TABLE 1-2:
AC CHARACTERISTICS
Industrial (I):
TAMB = -40°C to +85°C VCC = 1.8V to 3.6V
Param.
No.
Sym.
Characteristic
Min.
Max.
Units
Test Conditions
1FCLK
Clock Frequency
5
3
MHz
2.5V
Vcc 3.6V
1.8V
Vcc 2.5V
2TCSS
CS Setup Time
100
150
ns
2.5V
Vcc 3.6V
1.8V
Vcc 2.5V
3TCSH
CS Hold Time
100
150
ns
2.5V
Vcc 3.6V
1.8V
Vcc 2.5V
4TCSD
CS Disable Time
50
ns
5
Tsu
Data Setup Time
20
30
ns
2.5V
Vcc 3.6V
1.8V
Vcc 2.5V
6THD
Data Hold Time
40
50
ns
2.5V
Vcc 3.6V
1.8V
Vcc 2.5V
7TR
CLK Rise Time
100
ns
8TF
CLK Fall Time
100
ns
9THI
Clock High Time
100
150
ns
2.5V
Vcc 3.6V
1.8V
Vcc 2.5V
10
TLO
Clock Low Time
100
150
ns
2.5V
Vcc 3.6V
1.8V
Vcc 2.5V
11
TCLD
Clock Delay Time
50
ns
12
TCLE
Clock Enable Time
50
ns
13
TV
Output Valid from Clock
Low
100
160
ns
2.5V
Vcc 3.6V
1.8V
Vcc 2.5V
14
THO
Output Hold Time
0
ns
15
TDIS
Output Disable Time
80
160
ns
2.5V
Vcc 3.6V (Note 1)
1.8V
Vcc 2.5V (Note 1)
16
TWC
Internal Write Cycle Time
5
ms
17
Endurance
1,000,000
E/W
Cycles
Note 1: This parameter is periodically sampled and not 100% tested.
2: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance Model which can be obtained from Microchip’s web site:
www.microchip.com.
3: TWC begins on the rising edge of CS after a valid write sequence and ends when the internal write cycle
is complete.
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