參數(shù)資料
型號： MCS7840CV
廠商： Electronic Theatre Controls, Inc.
英文描述： USB-2.0 to Four Serial Ports
中文描述： 的USB 2.0 4個串行端口
文件頁數(shù)： 9/41頁
文件大小： 447K
代理商： MCS7840CV
MCS7840
USB-2.0 to Four Serial Ports
Rev.
1.2
Page 9
UART Register-Set and Register Descriptions
The UART has 10 registers, but only three address lines to access those registers. The mapping of the
registers is dependent upon the Line Control Register (LCR).
LCR[7] enables the Divider Latch Registers (DLL & DLM).
The following table gives the various UART registers and their offsets.
Register
Name
THR
RHR
Offset R/W Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
0
0
W
R
Data to be transmitted ( Transmitter Holding Register)
Data to be received (Receiver Holding Register)
IER
1
R/W
Reserved
Sleep
Mode
Modem
Int
Mask
Rx
Stat
Int
Mask
Flush
THR
Tx Rdy
Int
Mask
Rx Rdy
Int
Mask
FCR
2
W
RHR
Trigger Level
FIFOs
Enabled
Reserved
Reserved
Flush
RHR
FIFO
Enable
Interrupt
Pending
ISR
2
R
Reserved
Interrupt Priority
LCR
3
R/W
DLE
Tx
Break
Force
Parity
RTS/CTS
Flow
Control
THR
Empty
DSR
Odd/Even
Parity
Parity
Enable
Stop
Bits
Data Length
MCR
4
R/W
DTR – DSR/
DCD
Flow Control
Data
Error
DCD
Loop
Unused
RTS
DTR
LSR
5
R
Tx
Empty
RI
Rx
Break
CTS
Scratch Pad Register
Framing
Error
Δ
DCD
Parity
Error
Teri
Overrun
Error
Δ
DSR
Rx
Rdy
Δ
CTS
MSR
SPR
6
7
R
R/W
Additional standard registers - these are accessed when LCR[7] = 1
R/W
R/W
DLL
DLM
0
1
Divisor Latch bits[7:0]
Divisor Latch bits[15:8]
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