參數(shù)資料
型號: MCZ33793AEF
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: Distributed System Interface (DSI) Sensor Interface
中文描述: 分布式系統(tǒng)接口(DSI)傳感器接口
文件頁數(shù): 13/27頁
文件大小: 276K
代理商: MCZ33793AEF
Analog Integrated Circuit Device Data
Freescale Semiconductor
13
33793
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
A device may be permanently programmed one time with
an address using a two-command sequence. The first step is
satisfied on the reception of an Initialization command with
address set to zero, the PA[3:0] set to the address to be
programmed, and the NV bit set. This will cause the address
contained in the PA[3:0] bits to be stored in the address
register and the bus switch closed. The second step is taken
when a Read/Write NVM command is received with the
PA[3:0] bits matching the A[3:0] bits and also matching the
bits stored in the 33793 address register. This will cause the
33793 to permanently store this address into an internal NVM
area.
MESSAGES
The messages follow the format defined in the Distributed
Systems Interface Specification rev 1.0 unless otherwise
noted.
DSI BUS COMMANDS
This device can recognize and respond to both long-word
and short-word commands. A command word summary is
shown in
Table 6
. SW in the “Size” column of the table
indicates short-word commands and LW indicates long-word
commands. Short-word commands may also be sent in the
long-word format. However, when these commands are sent
in the long-word format, it is recommended that the data byte
be sent as $00 to maintain future compatibility. All commands
marked reserved should not be sent to 33793 slaves.
Table 6. DSI Bus Commands
Command
Size
Description
Data
C3
C2
C1
C0
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
LW
Initialization
NV
BS
G1
G0
PA3
PA2
PA1
PA0
0
0
0
1
SW
Request Status
0
0
1
0
SW
Request Value 0
0
0
1
1
LW
I/O Control
L3
L2
L1
L0
DR3
DR2
DR1
DR0
0
1
0
0
SW
Request ID Information
0
1
0
1
SW
Request Value 1
0
1
1
0
SW
Request Value 2
0
1
1
1
SW
Clear
1
0
0
0
SW
Request Value 3
1
0
0
1
LW
Read/Write NVM
1
1
1
1
PA3
PA2
PA1
PA0
1
0
1
0
Reserved
1
0
1
1
Reserved
1
1
0
0
SW
Clear Logic Out
1
1
0
1
SW
Set Logic Out
1
1
1
0
Reserved
1
1
1
1
LW
Reverse Initialization
NV
BS
G1
G0
PA3
PA2
PA1
PA0
Legend
BS = Controls closing of the Bus Switch (1 = close).
DR[3:0] = Direction of I/O. 1 = Output.
G[1:0] = Group assignment (the 33793 does not use these bits).
L[3:0] = Level to output on I/O if configured as outputs.
LO = Logic Out level.
PA[3:0] = Bus Address to set the device to.
NV = Allows nonvolatile address programming if set to "1".
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