
Analog Integrated Circuit Device Data
16
Freescale Semiconductor
33889
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 5. Dynamic Electrical Characteristics
VSUP From 5.5 V to 18 V, V2INT from 4.75 to 5.25 V and TJ from -40 to 150 °C, unless otherwise noted. Typical values noted
reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.
Conditions
Symbol
Min
Typ
Max
Unit
DIGITAL INTERFACE TIMING (SCLK, CS, MOSI, MISO)
SPI operation frequency
FREQ
-
4.0
MHz
SCLK Clock Period
tPCLK
250
-
ns
SCLK Clock High Time
tWSCLKH
125
-
ns
SCLK Clock Low Time
tWSCLKL
125
-
ns
Falling Edge of CS to Rising Edge of SCLK
tlLEAD
100
50
-
ns
Falling Edge of SCLK to Rising Edge of CS
tLAG
100
50
-
ns
MOSI to Falling Edge of SCLK
tSISU
40
25
-
ns
Falling Edge of SCLK to MOSI
tSIH
40
25
-
ns
MISO Rise Time (CL = 220 pF)
tRSO
-
25
50
ns
MISO Fall Time (CL = 220 pF)
tfSO
-
25
50
ns
Time from Falling or Rising Edges of CS to:
- MISO Low-impedance
- MISO High-impedance
tSOEN
tSODIS
-
50
ns
Time from Rising Edge of SCLK to MISO Data Valid
0.2 V1
SO 0.8 V1, CL = 200 pF
tVALID
-
50
ns
Delay between CS low to high transition (at end of SPI stop
command) and Stop or sleep mode activation
(21) detected by
V2 off
TCS-STOP
18
-
34
s
Interrupt low level duration
SBC in stop mode
TINT
7.0
10
13
s
Internal oscillator frequency
All modes except Sleep and Stop
(21)OSC-F1
-
100
-
kHz
Notes
21.
Guaranteed by design