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參數(shù)資料
| 型號(hào)： | MD83C154DTXXX-12P883 |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CDIP40 |
| 封裝： | 0.600 INCH, CERAMIC, DIP-40 |
| 文件頁(yè)數(shù)： | 29/242頁(yè) |
| 文件大?。?/td> | 3080K |
| 代理商： | MD83C154DTXXX-12P883 |
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124
2588F–AVR–06/2013
ATtiny261/461/861
the corresponding interrupt handling vector. Alternatively, OCF1A is cleared, after synchroniza-
tion clock cycle, by writing a logic one to the flag. When the I-bit in SREG, OCIE1A, and OCF1A
are set (one), the Timer/Counter1 A compare match interrupt is executed.
Bit 5 – OCF1B: Output Compare Flag 1B
The OCF1B bit is set (one) when compare match occurs between Timer/Counter1 and the data
value in OCR1B - Output Compare Register 1A. OCF1B is cleared by hardware when executing
the corresponding interrupt handling vector. Alternatively, OCF1B is cleared, after synchroniza-
tion clock cycle, by writing a logic one to the flag. When the I-bit in SREG, OCIE1B, and OCF1B
are set (one), the Timer/Counter1 B compare match interrupt is executed.
Bit 2 – TOV1: Timer/Counter1 Overflow Flag
In Normal Mode and Fast PWM Mode the TOV1 bit is set (one) each time the counter reaches
TOP at the same clock cycle when the counter is reset to BOTTOM. In Phase and Frequency
Correct PWM Mode the TOV1 bit is set (one) each time the counter reaches BOTTOM at the
same clock cycle when zero is clocked to the counter.
The bit TOV1 is cleared by hardware when executing the corresponding interrupt handling vec-
tor. Alternatively, TOV1 is cleared, after synchronization clock cycle, by writing a logical one to
the flag. When the SREG I-bit, and TOIE1 (Timer/Counter1 Overflow Interrupt Enable), and
TOV1 are set (one), the Timer/Counter1 Overflow interrupt is executed.
12.12.15 DT1 – Timer/Counter1 Dead Time Value
The dead time value register is an 8-bit read/write register.
The dead time delay of all Timer/Counter1 channels are adjusted by the dead time value regis-
ter, DT1. The register consists of two fields, DT1H3:0 and DT1L3:0, one for each
complementary output. Therefore a different dead time delay can be adjusted for the rising edge
of OC1x and the rising edge of OC1x.
Bits 7:4 – DT1H3:DT1H0: Dead Time Value for OC1x Output
The dead time value for the OC1x output. The dead time delay is set as a number of the pres-
caled timer/counter clocks. The minimum dead time is zero and the maximum dead time is the
prescaled time/counter clock period multiplied by 15.
Bits 3:0 – DT1L3:DT1L0: Dead Time Value for OC1x Output
The dead time value for the OC1x output. The dead time delay is set as a number of the pres-
caled timer/counter clocks. The minimum dead time is zero and the maximum dead time is the
prescaled time/counter clock period multiplied by 15.
Bit
76543210
DT1H3
DT1H2
DT1H1
DT1H0
DT1L3
DT1L2
DT1L1
DT1L0
DT1
Read/Write
R/W
Initial value
00000000
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MD83C154DXXX-12/883D | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CDIP40 |
| MR83C154DCXXX-16/883 | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQCC44 |
| MQ83C154DXXX-12P883 | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQFP44 |
| MD83C154DCXXX-25/883 | 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CDIP40 |
| MR83C154DTXXX-25/883R | 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CQCC44 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MD83C154-L16 | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
| MD83C154T-12 | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
| MD83C154T-16 | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
| MD83C154T-20 | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
| MD83C154T-25 | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
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