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參數(shù)資料
| 型號(hào)： | DAC8512FPZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 20/20頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT 5V COMPLETE 8-DIP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 設(shè)置時(shí)間： | 16µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 2.5mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 通孔 |
| 封裝/外殼： | 8-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 8-PDIP |
| 包裝： | 管件 |
| 輸出數(shù)目和類(lèi)型： | 1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | 62.5k |
| 產(chǎn)品目錄頁(yè)面： | 786 (CN2011-ZH PDF) |
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DAC8512
–9–
REV. A
APPLICATIONS SECTION
Power Supplies, Bypassing, and Grounding
All precision converter products require careful application of
good grounding practices to maintain full rated performance.
Because the DAC8512 has been designed for +5 V applications,
it is ideal for those applications under microprocessor or micro-
computer control. In these applications, digital noise is preva-
lent; therefore, special care must be taken to assure that its
inherent precision is maintained. This means that particularly
good engineering judgment should be exercised when address-
ing the power supply, grounding, and bypassing issues using the
DAC8512.
The power supply used for the DAC8512 should be well filtered
and regulated. The device has been completely characterized for
a +5 V supply with a tolerance of
±5%. Since a +5 V logic sup-
ply is almost universally available, it is not recommended to
connect the DAC directly to an unfiltered logic supply without
careful filtering. Because it is convenient, a designer might be
inclined to tap a logic circuit’s supply for the DAC’s supply.
Unfortunately, this is not wise because fast logic with nanosec-
ond transition edges induce high current pulses. The high tran-
sient current pulses can generate glitches hundreds of millivolts
in amplitude due to wiring resistances and inductances. This
high frequency noise will corrupt the analog circuits internal to
the DAC and cause errors. Even though their spike noise is
lower in amplitude, directly tapping the output of a +5 V system
supply can cause errors because these supplies are of the switch-
ing regulator type that can and do generate a great deal of high
frequency noise. Therefore, the DAC and any associated analog
circuitry should be powered directly from the system power sup-
ply outputs using appropriate filtering. Figure 23 illustrates how
a clean, analog-grade supply can be generated from a +5 V logic
supply using a differential LC filter with separate power supply
and return lines. With the values shown, this filter can easily
handle 100 mA of load current without saturating the ferrite
cores. Higher current capacity can be achieved with larger ferrite
cores. For lowest noise, all electrolytic capacitors should be low
ESR (Equivalent Series Resistance) type.
100
F
ELECT
.
10-22
F
TANT.
0.1
F
CER.
TTL/CMOS
LOGIC
CIRCUITS
+5V
POWER SUPPLY
+5V
RETURN
FERRITE BEADS:
2 TURNS, FAIR-RITE
#2677006301
Figure 23. Properly Filtering a +5 V Logic Supply Can Yield
a High Quality Analog Supply
In order to fit the DAC8512 in an 8-pin package, it was neces-
sary to use only one ground connection to the device. The
ground connection of the DAC serves as the return path for
supply currents as well as the reference point for the digital in-
put thresholds. The ground connection also serves as the supply
rail for the internal voltage reference and the output amplifier.
Therefore, to minimize any errors, it is recommended that
the ground connection of the DAC8512 be connected to a high
quality analog ground, such as the one described above. Gener-
ous bypassing of the DAC’s supply goes a long way in reducing
supply line-induced errors. Local supply bypassing consisting of
a 10
F tantalum electrolytic in parallel with a 0.1 F ceramic is
recommended. The decoupling capacitors should be connected
between the DAC’s supply pin (Pin 1) and the analog ground
(Pin 7). Figure 24 shows how the ground and bypass connec-
tions should be made to the DAC8512.
6
2
GND
V
DD
8
DAC8512
10
F
0.1
F
V
OUT
1
+5V
TO ANALOG GROUND
CS
CLR
5
3
4
LD
SCLK
SDI
V
OUT
7
Figure 24. Recommended Grounding and Bypassing
Scheme for the DAC8512
Unipolar Output Operation
This is the basic mode of operation for the DAC8512. As shown
in Figure 24, the DAC8512 has been designed to drive loads as
low as 2 k
in parallel with 500 pF. The code table for this op-
eration is shown in Table II.
10
F
0.1
F
0V
≤ V
OUT ≤ 4.095V
+5V
2k
500pF
6
2
V
DD
8
DAC8512
1
CS
CLR
5
3
4
LD
SCLK
SDI
7
GND
V
OUT
Figure 25. Unipolar Output Operation
Table II. Unipolar Code Table
Hexadecimal Number
Decimal Number
Analog Output
in DAC Register
Voltage (V)
FFF
4095
+4.095
801
2049
+2.049
800
2048
+2.048
7FF
2047
+2.047
000
0
Typical Performance Characteristics—
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