參數資料
型號: MDS213CG
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 網絡接口
英文描述: 12-Port 10/100Mbps + 1Gbps Ethernet Switch
中文描述: DATACOM, LAN SWITCHING CIRCUIT, PBGA456
封裝: 35 X 35 MM, 2.33 MM HEIGHT, MS-034, HSBGA-456
文件頁數: 74/120頁
文件大小: 1678K
代理商: MDS213CG
MDS213
Data Sheet
74
Zarlink Semiconductor Inc.
Bit [24]
Bit [31:25] Reserved
Note:
MAIL_ARR, CPU_Q_Out and interrupts cannot be cleared by the CPU. They will be cleared whenever their
queues are emptied.
MCT
Search Engine found looped MCT Chain.
18.2.3 Buffer Memory interface register
18.2.3.1 MWARS - Memory Write Address Register - Single Cycle
Access:
Zero-Wait-State,
via FIFO,
Write
Address:
h780
Bit [0]
LK
Lock Flag (for internal memory only)LK=0 UnlockLK=1 Lock
Bit [1]
SP
Swap Byte Order
Bit [20:2]
MA [20:2]
Buffer memory address Bit [20:2] - (Bit [1:0] = 00)
Bit [21]
Reserved
Bit [22]
I/E
Indicates the Address is Internal or External memory
I/E=0 Internal memory
I/E=1 External memory
Bit [27:23] Count
Must be 00001
Bit [31:28] BE [3:0]
Byte lane enables
18.2.3.2 MRARS - Memory Read Address Register - Single Cycle
Access:
Zero-Wait-State,
via FIFO,
Write
Address:
h784
Bit [0]
LK
Lock Flag memory
LK=0 Unlock
Swap Byte Order
Buffer memory address Bit [20:2] - (Bit [1:0] = 00)
LK=1 Lock
Bit [1]
Bit [20:2]
Bit [21]
Bit [22]
SP
MA [20:2]
Reserved
I/E
Indicate the Address is Internal or External memory
I/E=0 Internal memory
I/E=1 External memory
CPU Bus Type
Bit [31]
Bit [30]
Bit [29]
Bit [28]
Little Endian
BE [3]
BE [2]
BE [1]
BE [0]
Big Endian
BE [0]
BE [1]
BE [2]
BE [3]
31
3 2 1 0
Address MA[20:3]
28 27 26
24 23 22 21 20
SP
BE[3:0]
00001
I/E
LK
Address MA[20:2]
24 23 22 21 20
SP
BE[3:0]
00001
I/E
LK
31
3 2 1 0
28 27
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