參數(shù)資料
型號(hào): MF0ICU2101DUD
廠商: NXP Semiconductors N.V.
封裝: MF0ICU1001U/V7D<Uncased die|<<<1<Always Pb-free,;
文件頁(yè)數(shù): 6/15頁(yè)
文件大?。?/td> 80K
代理商: MF0ICU2101DUD
MF0ICU2_SDS_32
NXP B.V. 2009. All rights reserved.
Product short data sheet
PUBLIC
Rev. 3 — 19 May 2009
171432
6 of 15
NXP Semiconductors
MF0ICU2
MIFARE Ultralight C
7.3 Memory organization
The 1536-bit EEPROM memory is organized in 48 pages with 32 bits each. In the erased
state the EEPROM cells are read as a logical “0”, in the written state as a logical “1”.
7.3.1
UID/serial number
The unique 7 byte serial number (UID) and its two Block Check Character Bytes (BCC)
are programmed into the first 9 bytes of the memory. It therefore covers page 00h, page
01h and the first byte of page 02h. Due to security and system requirements these bytes
are write-protected after having been programmed by the IC manufacturer after
production.
According to ISO/IEC14443-3 BCC0 is defined as CT
SN0
SN1
SN2.
Abbreviations CT stays for Cascade Tag byte (88h) and BCC1 is defined as SN3
SN4
SN5
SN6.
SN0 holds the Manufacturer ID for NXP (04h) according to ISO/IEC14443-3 and
ISO/IEC 7816-6 AMD.1.
Table 3.
Page address
Decimal
0
1
2
3
4 to 39
40
41
42
43
44 to 47
Memory organization
Byte number
0
serial number
serial number
serial number
OTP
user memory
lock bytes
16-bit counter
authentication configuration
authentication configuration
authentication key
Hex
00h
01h
02h
03h
04h to 27h
28h
29h
2Ah
2Bh
2Ch to 2Fh
1
2
3
internal
OTP
user memory
lock bytes
16-bit counter
lock bytes
OTP
user memory
-
-
lock bytes
OTP
user memory
-
-
Fig 4.
UID/serial number
001aai001
MSBit
0
LSBit
0
page 0
byte
check byte 0
serial number
part 1
serial number
part 2
manufacturer ID for NXP (04h)
0
0
0
0
1
0
0
1
2
3
page 1
0
1
2
3
page 2
0
1
2
3
internal
check byte 1
lock bytes
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