參數(shù)資料
型號(hào): MH16S64BAMD-6
廠商: Mitsubishi Electric Corporation
英文描述: 1,073,741,824-BIT ( 16,777,216-WORD BY 64-BIT ) Synchronous DYNAMIC RAM
中文描述: 1073741824位(16,777,216字64位)同步動(dòng)態(tài)隨機(jī)存儲(chǔ)器
文件頁(yè)數(shù): 17/52頁(yè)
文件大小: 1042K
代理商: MH16S64BAMD-6
MH16S64AMA -8,-10,-12
1073741824-BIT (16777216 - WORD BY 64-BIT)SynchronousDRAM
MITSUBISHI LSIs
( / 52 )
17
MITSUBISHI
ELECTRIC
4. Mar.1997
Preliminary Spec.
Some contents are subject to change without notice.
MIT-DS-0127-0.0
Bank Activation and Precharge All (BL=4, CL=3)
CK
Command
A0-9,11
A10
BA0,1
DQ
ACT
Xa
Xa
00
READ
Y
0
00
Qa0
Qa1
Qa2
Qa3
ACT
Xb
Xb
01
PRE
tRRD
tRCD
1
ACT
Xb
Xb
01
Precharge all
tRAS
tRP
OPERATION DESCRIPTION
BANK ACTIVATE
The SDRAM has two independent banks. Each bank is activated by the ACT command with
the bank address(BA0,1). A row is indicated by the row address A11-0. The minimum
activation interval between one bank and the other bank is tRRD.
PRECHARGE
The PRE command deactivates indicated by BA. When both banks are active, the precharge
all command(PREA,PRE + A10=H) is available to deactivate them at the same time. After tRP
from the precharge, an ACT command can be issued.
READ
After tRCD from the bank activation, a READ command can be issued. 1st output date is
available after the /CAS Latency from the READ, followed by (BL-1) consecutive date when
the Burst Length is BL. The start address is specified by A9-0, and the address sequence of
burst data is defined by the Burst Type. A READ command may be applied to any active bank,
so the row precharge time(tRP) can be hidden behind continuous output data(in case of BL=8)
by interleaving the dual banks. When A10 is high at a READ command, the
auto-precharge(READA) is performed. Any command (READ, WRITE, PRE, ACT) to the
same bank is inhibited till the internal precharge is complete. The internal precharge start
timing depends on /CAD Latency. The next ACT command can be issued after tRP from the
internal precharge timing.
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