參數(shù)資料
型號(hào)： MH16S72DAMD-7
廠商： Mitsubishi Electric Corporation
英文描述： 1207959552-BIT (16777216 - WORD BY 72-BIT)Synchronous DRAM
中文描述： 1207959552位（16777216 - Word的72位）同步DRAM
文件頁(yè)數(shù)： 19/52頁(yè)
文件大?。?/td> 1045K
代理商： MH16S72DAMD-7
MH16S72AMA -8,-10,-12
1207959552-BIT (16777216 - WORD BY 72-BIT)SynchronousDRAM
MITSUBISHI LSIs
( / 52 )
19
MITSUBISHI
ELECTRIC
5. Mar.1997
Preliminary Spec.
Some contents are subject to change without notice.
MIT-DS-0128-0.0
Dual Bank Interleaving WRITE (BL=4)
CK
Command
A10
DQ
ACT
Xa
Xa
0
Write
Y
0
0
Write
Y
0
1
Da0
Da1
Da2
Da3
ACT
Xb
Xb
1
PRE
0
0
tRCD
Burst Length
Db0
Db1
Db2
Db3
tRCD
tWR
CK
Command
A10
DQ
ACT
Xa
Xa
0
Write
Y
1
0
Da0
Da1
Da2
Da3
ACT
Xa
Xa
0
Internal precharge begins
tRCD
tRP
tWR
WRITE with Auto-Precharge (BL=4)
WRITE
After tRCD from the bank activation, a WRITE command can be issued. 1st input data is set
at the same cycle as the WRITE. Following(BL-1) data are written into the RAM, when the
Burst Length is BL. The start address is specified by A9-0, and the address sequence of burst
data is defined by the Burst Type. A WRITE command may be applied to any active bank, so
the row precharge time(tRP) can be hidden behind continuous input data (in case of BL=8) by
interleaving the dual banks. From the last input data to the PRE command, the write recovery
time (tWR) is required. When A10 is high at a WRITE command, the auto-precharge(WRITEA)
is performed. Any command(READ, WRITE, PRE, ACT) to the same bank is inhibited till the
internal precharge is complete. The internal precharge begins at tWR after the last input data
cycle. The next ACT command can be issued after tRP from the internal precharge timing.
A0-9,11
BA0,1
A0-9,11
BA0,1
相關(guān)PDF資料
PDF描述
MH16S72DAMD-8 1207959552-BIT (16777216 - WORD BY 72-BIT)Synchronous DRAM
MH16S72DCFA-6 1,207,959,552-BIT ( 16,777,216-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH16S72PJB-7 1207959552-BIT ( 16777216-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH16S72PJB-8 1207959552-BIT ( 16777216-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH16S72AVJB-6 AB 7C 2#12 5#16 SKT STRT PLUG
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MH16S72DAMD-8 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:1207959552-BIT (16777216 - WORD BY 72-BIT)Synchronous DRAM
MH16S72DCFA-6 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:1,207,959,552-BIT ( 16,777,216-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH16S72DDFA-7 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:1,207,959,552-BIT ( 16,777,216-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH16S72DDFA-8 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:1,207,959,552-BIT ( 16,777,216-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH16S72PHB-10 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:1207959552-BIT (16777216 - WORD BY 72-BIT)SynchronousDRAM
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