參數(shù)資料
型號(hào)： MH1P
廠商： Mitel Networks Corporation
英文描述： Quadrature Downconverter
中文描述： 正交下變頻器
文件頁(yè)數(shù)： 13/20頁(yè)
文件大?。?/td> 566K
代理商： MH1P
13
SL1711
Programming of Synthesisers
A SP5611 synthesiser is used to set the frequency of the
SL1711 VCO 480MHz. Since the SL1711 incorporates a
divide by 32 the synthesised frequency that the SP5611 must
be programmed to is 480/32=15MHz.
Example
a) To program the SL1711 to 480MHz.
I2C Byte
Byte 1 (address)
Byte 2 (programmable divider 8 MSBs)
Byte 3 (programmable divider 8 LSBs)
Byte 4 (control data)
Byte 5 (port data)
Hex Code
C2
00
F0
CE
00
C2 is the address byte byte 1.
0F00 is the programmable divider information bytes 2 and 3.
CE is the control data information byte 4.
**Note - the programmable divider information should be
set to program 480MHz /32 = 15MHz since the SL1711
provides a divide by 32 prescaler output rather than the VCO
carrier frequency.
It is not possible to program the VCO to 479.5MHz when
using a 7.8125kHz phase comparator frequency. The mini-
mum step size is 7.8125kHz x 8 (RF prescaler inside SP5611)
x 32 (SL1711 output prescaler) = 2MHz.
If the reference divider is set to 1024 mode3.90625kHz
phase comparator frequency, the minimum step size will be
1MHz.
This may be achieved by programming the control byte to
CC and modifying the programmable divider information for
the new step size.
SL1711 Operation
The SL1711 will mix an IF input with its own local oscillator.
This is controlled as above via a SP5611 synthesiser.
Normally the VCO will be set to the same frequency as the
IF input, and the signal mixed directly down to baseband.
Alternatively, a CW RF source may be fed into the input of
the SL1711 which is deliberately offset from the VCO. By
varying the offset from 0-20MHz and monitoring the I and Q
channel baseband outputs, the flatness response of the chip/
output filter can be measured.
The SL1711 oscillator may also be disabled by setting the
ON-VCO-OFF switch to the OFF position.
An AGC voltage adjust pot marked AGC ADJUST is
provided, together with a test point.
Measurement of Gain and Phase Match.
a)Synthesise the required frequency 480MHz is used in the
example above.
b)Connect an RF signal generator to the input.
c)Input a signal which should give an output of approx 0dBm
(0.707V p-p), in combination with the appropriate AGC set-
ting.
d)Connect a vector voltmeter to the BUFFERED outputs
when using 50
inputs. When using high impedance probes,
the direct outputs may be used. Selection of outputs is via the
on board U links.
e)CALIBRATE the vector voltmeter and the leads to be used.
The calibration should be performed at the chosen baseband
frequency and level for maximum accuracy.
f) Vary the RF input frequency either side of the LO and note
the relative I and Q gain and phase reading.
If you experience any difficulties with this board, or require
further help, please contact Robert Marshon 01793 518234
or Fred Hermanon 01793 518423
相關(guān)PDF資料
PDF描述
MH1Q Quadrature Downconverter
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MH1Q 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Quadrature Downconverter
MH1RT 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Radiation Tolerant 0.35 um CMOS
MH1RT_07 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Rad Hard 1.6M Used Gates 0.35 μm CMOS Sea of Gates/ Embedded Array
MH1S64CWXTJ-12 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:67108864-BIT (1048576-WORD BY 64-BIT)SynchronousDRAM
MH1S64CWXTJ-15 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:67108864-BIT (1048576-WORD BY 64-BIT)SynchronousDRAM
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