參數(shù)資料
型號： MH2S64CWXTJ-1539
廠商： Mitsubishi Electric Corporation
英文描述： 134217728-BIT (2097152-WORD BY 64-BIT)SynchronousDRAM
中文描述： 134217728位（2097152字，64位）SynchronousDRAM
文件頁數(shù)： 20/45頁
文件大小： 691K
代理商： MH2S64CWXTJ-1539
MH2S64CZTJ/CWZTJ-12,-15,-1539
134217728-BIT (2097152-WORD BY 64-BIT)SynchronousDRAM
[ Read Interrupted by Precharge ]
Burst read operation can be interrupted by precharge of the same or the other bank. Read
to PRE interval is minimum 1 CK. A PRE command disables the data output, depending on
the /CAS Latency. The figure below shows examples, when the dataout is terminated.
Read Interrupted by Precharge (BL=4)
MITSUBISHI LSIs
( / 45 )
20
MITSUBISHI
ELECTRIC
Oct.28.1996
Preliminary Spec.
Some contents are subject to change without notice.
MIT-DS-0019-0.4
CK
Command
DQ
READ
PRE
Q0
Q2
Q3
Q1
Command
DQ
READ
Q0
Q1
Command
DQ
READ
PRE
Q0
Q1
Command
DQ
READ
PRE
Q0
Q1
Command
DQ
READ
PRE
Q0
Q2
Q3
Q1
Command
DQ
READ
PRE
Q0
Q1
PRE
Q2
Q3
CL=4
CL=3
CL=2
Comman
d
DQ
REA
D
PRE
Q
0
Q
2
Q
3
Q
1
Comman
d
DQ
REA
D
PR
E
Q
0
Q
1
CL=
1
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MH2S64CWZTJ-12 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:134217728-BIT (2097152-WORD BY 64-BIT)SynchronousDRAM
MH2S64CWZTJ-15 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:134217728-BIT (2097152-WORD BY 64-BIT)SynchronousDRAM
MH2S64CWZTJ-1539 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:134217728-BIT (2097152-WORD BY 64-BIT)SynchronousDRAM
MH2S64CZTJ-12 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:134217728-BIT (2097152-WORD BY 64-BIT)SynchronousDRAM
MH2S64CZTJ-15 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:134217728-BIT (2097152-WORD BY 64-BIT)SynchronousDRAM
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