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| 型號(hào)： | MH4M365CNXJ-6 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | HYPER PAGE MODE 150994944-BIT ( 4194304-WORD BY 36-BIT ) DYNAMIC RAM |
| 中文描述： | 超頁(yè)模式150994944位（4194304 - Word的36位）動(dòng)態(tài)隨機(jī)存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 4/15頁(yè) |
| 文件大小： | 224K |
| 代理商： | MH4M365CNXJ-6 |
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MITSUBISHI
ELECTRIC
( / 15 )
4
HYPER PAGE MODE 150994944-BIT ( 4194304-WORD BY 36-BIT ) DYNAMIC RAM
MITSUBISHI LSIs
MH4M365CXJ/CNXJ-5,-6,-7
Nov.8.96
MIT-DS-0086-1.1
CAPACITANCE
Limits
Typ
Min
Max
Unit
pF
pF
pF
pF
pF
Input capacitance,address inputs
C
I (A)
C
I (RAS)
C
I (CAS)
C
I / O
C
I (W)
Symbol
Parameter
Test conditions
Input capacitance, write control input
Input capacitance, RAS input
Input capacitance, CAS input
Input/Output capacitance, data ports
78
84
42
42
22
V
I
=Vss
f=1MH
Z
Vi=25mVrms
(Ta=0 ~ 70 °C, Vcc=5.0V ± 10%, Vss=0V, unless otherwise noted)
SWITCHING CHARACTERISTICS
(Ta=0 ~ 70 °C, Vcc = 5V ± 10%, Vss=0V, unless otherwise noted , see notes 6,14,15)
Parameter
Access time from CAS
Access time from RAS
Column address access time
Symbol
ns
ns
ns
ns
15
30
35
60
13
25
30
50
Access time from CAS precharge
Output hold time from CAS
Output hold time from RAS
(Note 7,8)
(Note 7,9)
(Note 7,10)
(Note 7,11)
Limits
Unit
Min
Max
MH4M365C -5
Min
Max
20
35
40
70
Min
Max
5
5
ns
ns
ns
ns
Output disable time after WE high
Output disable time after CAS high
Output disable time after RAS high
13
13
13
15
15
15
(Note 12)
(Note 12,13)
(Note 12,13)
Output low impedance time from CAS low (Note 7)
5
20
20
20
Note 6: An initial pause of 500μs is required after power-up followed by a minimum of eight initialization cycles (any combination of cycles
containing a RAS clock such as RAS-Only refresh).
Note the RAS may be cycled during the initial pause . And any 8 RAS or RAS/CAS cycles are required after prolonged periods
(greater than 32 ms) of RAS inactivity before proper device operation is achieved.
7: Measured with a load circuit equivalent to VOH=2.4V(IOH=-5mA) / VOL=0.4V(IOL=-4.2mA) load 100pF.
The reference levels for measuring of output signal are 2.0V(VOH) and 0.8V(VOL).
8: Assumes that t
RCD
≥
t
RCD(max)
and t
ASC
≥
t
ASC(max)
and t
CP
≥
t
CP(max).
9: Assumes that t
RCD
≤
t
RCD(max)
and t
RAD
≤
t
RAD(max).
If t
RCD
or
t
RAD
is greater than the maximum recommended value shown in this table,
t
RAC
will increase by amount that t
RCD
exceeds the value shown.
10: Assumes that t
RAD
≥
t
RAD(max)
and t
ASC
≤
t
ASC(max).
11: Assumes that t
CP
≤
t
CP(max)
and t
ASC
≥
t
ASC(max).
12:
t
WEZ(max) ,
t
OFF(max)
and
t
REZ(max)
defines the time at which the output achieves the high impedance state ( I
OUT
≤
I ± 10 μA I)
and is not reference to V
OH(min)
or
V
OL(max).
13: Output is disabled after both RAS and CAS go to high.
ns
ns
5
5
5
5
5
5
(Note 13)
t
CAC
t
RAC
t
AA
t
CPA
t
OHC
t
OHR
t
CLZ
t
WEZ
t
OFF
t
REZ
MH4M365C -6
MH4M365C -7
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MH4M365CNXJ-7 | 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:HYPER PAGE MODE 150994944-BIT ( 4194304-WORD BY 36-BIT ) DYNAMIC RAM |
| MH4M365CXJ-5 | 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:HYPER PAGE MODE 150994944-BIT ( 4194304-WORD BY 36-BIT ) DYNAMIC RAM |
| MH4M365CXJ-6 | 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:HYPER PAGE MODE 150994944-BIT ( 4194304-WORD BY 36-BIT ) DYNAMIC RAM |
| MH4M365CXJ-7 | 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:HYPER PAGE MODE 150994944-BIT ( 4194304-WORD BY 36-BIT ) DYNAMIC RAM |
| MH4M36CJD-5 | 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:FAST PAGE MODE ( 4194304-WORD BY 36-BIT ) DYNAMIC RAM |
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