參數(shù)資料
型號: MH4S64CBMD-12
廠商: Mitsubishi Electric Corporation
英文描述: 268435456-BIT (4194304-WORD BY 64-BIT)SynchronousDRAM
中文描述: 268435456位(4194304字,64位)SynchronousDRAM
文件頁數(shù): 47/55頁
文件大?。?/td> 586K
代理商: MH4S64CBMD-12
MH4S64BLG -7,-8,-10
268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM
MITSUBISHI LSIs
( 47
MITSUBISHI
ELECTRIC
29.Oct.1998
Preliminary Spec.
Some contents are subject to change without notice.
MIT-DS-0227-0.5
Self-Refresh
/CS
/RAS
/CAS
/WE
CKE
BA0,1
DQ
Self-Refresh Entry
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
CLK
Before Self-Refresh Entry,
all banks must be idle state.
X
X
X
0
Self-Refresh Exit
ACT#0
After tRC from Self-Refresh Exit,
all banks are idle state.
tRC
tSRX
CLK can be stopped
CKE must be low to maintain Self-Refresh
Italic parameter
indicates minimum case
A0-8
A10
DQM
A9,11
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