參數(shù)資料
型號(hào)： MH64S64APFH-6
廠商： Mitsubishi Electric Corporation
英文描述： 4294967296-BIT (67108864 - WORD BY 64-BIT)SynchronousDRAM
中文描述： 4294967296位（67108864 -文字，64位）SynchronousDRAM
文件頁(yè)數(shù)： 17/52頁(yè)
文件大?。?/td> 604K
代理商： MH64S64APFH-6
MITSUBISHI LSIs
( 17
MITSUBISHI
ELECTRIC
Preliminary Spec.
Some contents are subject to change without notice.
MIT-DS-0392-0.1
MH64S64APFH-6,-6L,-7,-7L
4294967296-BIT (67108864 - WORD BY 64-BIT)SynchronousDRAM
16.Apr.2000
Bank Activation and Precharge All (BL=4, CL=2)
CK
Command
A0-9,11-12
A10
BA0,1
DQ
ACT
Xa
Xa
00
READ
Yb
0
01
Qa0
Qa1
Qa2
Qa3
ACT
Xb
Xb
01
PRE
tRRD
tRCD
1
ACT
Xa
Xa
00
Precharge all
tRP
OPERATION DESCRIPTION
BANK ACTIVATE
One of four banks is activated by an ACT command.
An bank is selected by BA0-1. A row is selected by A0-12.
Multiple banks can be active state concurrently by issuing multiple ACT commands.
Minimum activation interval between one bank and another bank is tRRD.
PRECHARGE
An open bank is deactivated by a PRE command.
A bank to be deactivated is designated by BA0-1.
When multiple banks are active, a precharge all command (PREA, PRE + A10=H)
deactivates all of open banks at the same time. BA0-1 are "Don't Care" in this case.
Minimum delay time of an ACT command after a PRE command to the same bank is tRP.
READ
A READ command can be issued to any active bank. The start address is specified by A0-9
(x8) . 1st output data is available after the /CAS Latency from the READ. The consecutive data
length is defined by the Burst Length. The address sequence of the burst data is defined by
the Burst Type. Minimum delay time of a READ command after an ACT command to the
same bank is tRCD.
When A10 is high at a READ command, auto-precharge (READA) is performed. Any
command (READ, WRITE, PRE, ACT, TBST) to the same bank is inhibited till the internal
precharge is complete. The internal precharge starts at the BL after READA. The next ACT
command can be issued after (BL + tRP) from the previous READA. In any case, tRCD+BL >
tRASmin must be met.
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參數(shù)描述
MH64S64APFH-6L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4294967296-BIT (67108864 - WORD BY 64-BIT)SynchronousDRAM
MH64S64APFH-7 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4294967296-BIT (67108864 - WORD BY 64-BIT)SynchronousDRAM
MH64S64APFH-7L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4294967296-BIT (67108864 - WORD BY 64-BIT)SynchronousDRAM
MH64S72AWJA-6 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH64S72AWJA-7 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
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