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參數(shù)資料
| 型號(hào)： | MH88437-P |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Data Access Arrangement(數(shù)據(jù)存取陣列（在音頻或數(shù)據(jù)傳送設(shè)備和電話線之間提供一個(gè)完全接口）) |
| 中文描述： | 數(shù)據(jù)訪問安排（數(shù)據(jù)存取陣列（在音頻或數(shù)據(jù)傳送設(shè)備和電話線之間提供一個(gè)完全接口）） |
| 文件頁數(shù)： | 2/16頁 |
| 文件大?。?/td> | 96K |
| 代理商： | MH88437-P |
MH88437-P
Advance Information
2
Figure 2 - Pin Connections
Pin Description
Pin #
Name
Description
1
NB1
Network Balance 1.
External passive components must be connected between this pin and
NB2.
2
NB2
Network Balance 2.
External passive components must be connected between this pin and
NB1.
3
VR+
Differential Receive (Input).
Analog input from modem/fax chip set.
4
VR-
Differential Receive (Input).
Analog input from modem/fax chip set.
5
VX
Transmit (Output).
Ground referenced (AGND) output to modem/fax chip set, biased at
+2.0V.
6
LC
Loop Control (Input).
A logic 1 applied to this pin activates internal circuitry which provides
a DC termination across Tip and Ring. This pin is also used for dial pulse application.
7
ZA
Line Impedance.
Connect impedance matching components from this pin to Ground
(AGND).
8
AGND
Analog Ground.
4-Wire 0V reference connect to mains earth (ground).
9
V
CC
VBIAS
Positive Supply Voltage
. +5V.
10
Internal Reference Voltage.
+2.0V reference voltage. This pin should be decoupled
externally to AGND, typically with a 10
μ
F
6.3V capacitor
.
11
LOOP
Loop (Output).
The output voltage on this pin is proportional to the line voltage across Tip -
Ring, scaled down by a factor of 50.
12,
14
IC
Internal Connection.
No connection should be made to this pin externally.
13
RS
Ringing Sensitivity.
Connecting a link or resistor between this pin and LOOP (pin 11) will
vary the ringing detection sensitivity of the module.
15
LCD
Loop Condition Detect (Output).
Indicates the status of loop current.
16
RV
Ringing Voltage Detect (Output).
The RV output indicates the presence of a ringing voltage
applied across the Tip and Ring leads.
17
CL
Current Limit.
A logic 0 applied to this pin activates internal circuitry which limits the loop
current.
18
NP
No Pin.
Isolation Barrier, fitted, no pin fitted in this position.
19
NP
No Pin
. Isolation barrier, no pin fitted in this position
CL
RV
LCD
IC
NP
NP
LC
ZA
IC
VLOOP1
VLOOP2
IC
SC
SC
TIP
RING
AGND
VCC
VBIAS
LOOP
VX
VR-
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VR+
NB1
NB2
IC
RS
IC
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MH88437 | Data Access Arrangement Advance Information |
| MH88437AS-PI | Data Access Arrangement Advance Information |
| MH88437AS-P | Data Access Arrangement Advance Information |
| MH88437-P | Data Access Arrangement Advance Information |
| MH88437AD-P | Data Access Arrangement Advance Information |
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| MH88500IN | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Hybrid Subscriber Line Interface Circuit (SLIC) Preliminary Information |
| MH88510 | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Subscriber Line Interface Circuit (SLIC) Preliminary Information |
| MH88511 | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Subscriber Line Interface Circuit (SLIC) Preliminary Information |
| MH88520-1 | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:German Subscriber Line Interface Circuit (SLIC) Preliminary Information |
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