- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371108 > MH8S64BALD-7 (Mitsubishi Electric Corporation) 536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM PDF資料下載
參數(shù)資料
| 型號： | MH8S64BALD-7 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| 中文描述： | 536870912位（8388608 -文字，64位）SynchronousDRAM |
| 文件頁數(shù)： | 22/55頁 |
| 文件大?。?/td> | 588K |
| 代理商： | MH8S64BALD-7 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁當前第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁
MH8S64PHC -7,-8,-10
536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM
MITSUBISHI LSIs
( / 55 )
22
MITSUBISHI
ELECTRIC
9/ Dec. /1998
Preliminary Spec.
Some contents are subject to change without notice.
MIT-DS-0282-0.0
BURST INTERRUPTION
[ Read Interrupted by Read ]
Burst read option can be interrupted by new read of any bank. Random column access is
allowed. READ to READ interval is minimum 1 CK
Read Interrupted by Read (BL=4, CL=3)
CK
Command
A10
DQ
READ
Yi
0
00
READ
Yk
0
10
Qai0
Qaj1 Qbk0 Qbk1
READ
Yj
0
00
Qaj0
Qbk2
Qal0
READ
Yl
0
01
Qal1
Qal2
Qal3
[ Read Interrupted by Write ]
Burst read operation can be interrupted by write of the same or the other bank. Random
column access is allowed. In this case, the DQ should be controlled adequately by using the
DQMB0-7 to prevent the bus contention. The output is disabled automatically 1 cycle after
WRITE assertion.
Read Interrupted by Write (BL=4, CL=3)
CK
Command
A10
Q
READ
Yi
0
00
Qai0
Write
Yj
0
00
D
Daj0
Daj1
Daj2
Daj3
DQMB0-7
DQM control
Write control
A0-9
BA0,1
A0-9
BA0,1
A11
A11
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MH8S64BALD-8 | 536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| MH8S64BBKD-10 | 536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| MH8S64BBKD-10L | 536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| MH8S64BBKG-10 | 536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| MH8S64FFC-10 | 536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MH8S64BALD-8 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| MH8S64BBKD-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| MH8S64BBKD-10L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| MH8S64BBKG-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| MH8S64BBKG-10L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。