- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371108 > MH8S64DBKG-6 (Mitsubishi Electric Corporation) 536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM PDF資料下載
參數(shù)資料
| 型號(hào)： | MH8S64DBKG-6 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| 中文描述： | 536870912位（8388608 -文字，64位）SynchronousDRAM |
| 文件頁(yè)數(shù)： | 5/55頁(yè) |
| 文件大小： | 588K |
| 代理商： | MH8S64DBKG-6 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)當(dāng)前第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)
MH8S64PHC -7,-8,-10
536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM
MITSUBISHI LSIs
( / 55 )
MITSUBISHI
ELECTRIC
9/ Dec. /1998
Preliminary Spec.
Some contents are subject to change without notice.
MIT-DS-0282-0.0
Serial Presence Detect Table II
31
32
Density of each bank on module
Command and Address signal input setup time
64MByte
2ns
N/A
10
20
00
36-61
62
Superset Information (may be used in future)
SPD Revision
option
rev 1.2A
00
12
rev 1
01
63
Checksum for bytes 0-62
Check sum for -8
Check sum for -10
4D
4A
64-71
72
Manufactures Jedec ID code per JEP-108E
Manufacturing location
MITSUBISHI
Miyoshi,Japan
Tajima,Japan
NC,USA
Germany
1CFFFFFFFFFFFFFF
01
02
03
04
73-90
Manufactures Part Number
MH8S64PHC-8
MH8S64PHC-10
91-92
93-94
95-98
99-125
126
Revision Code
Manufacturing date
Assembly Serial Number
Manufacture Specific Data
Intetl specification frequency
PCB revision
year/week code
serial number
option
100MHz
66MHz
CL=2/3,AP,CK0,2
CL=3,AP,CK0,2
rrrr
yyww
ssssssss
00
64
66
AF
AD
127
Intel specification CAS# Latency support
06
128+
Unused storage locations
open
00
-7,-8
-10
20
00
33
Command and Address signal input hold time
-7,-8
-10
1ns
N/A
10
00
34
Data signal input setup time
-7,-8
-10
2ns
N/A
1ns
N/A
35
Data signal input hold time
-7,-8
-10
10
00
-7,-8
-10
Check sum for -7
0D
MH8S64PHC-7
4D48385336345048432D3720202020202020
4D48385336345048432D3820202020202020
-7,-8
-10
-7
-10
4D48385336345048432D3130202020202020
CL=2/3
-8
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MH8S64DBKG-6L | 536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| MH8S64DBKG-7 | 536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| MH8S64DBKG-7L | 536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| MH8S64DBKG-8 | 536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| MH8S64DBKG-8L | 536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MH8S64DBKG-6L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| MH8S64DBKG-7 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| MH8S64DBKG-7L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| MH8S64DBKG-8 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| MH8S64DBKG-8L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。