參數(shù)資料
型號: MH8S72BALD-7
廠商: Mitsubishi Electric Corporation
英文描述: 603979776-BIT (8388608 - WORD BY 72-BIT)SynchronousDRAM
中文描述: 603979776位(8388608 - Word的72位)SynchronousDRAM
文件頁數(shù): 17/56頁
文件大?。?/td> 732K
代理商: MH8S72BALD-7
MITSUBISHI
ELECTRIC
603,979,776-BIT ( 8,388,608-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH8S72BAFD -7, -8
MITSUBISHI LSIs
Preliminary
Spec.
1/ Dec./1998
MIT-DS-0273-0.2
17
AVERAGE SUPPLY CURRENT from Vdd
(Ta=0 ~70°C, Vdd = 3.3 ± 0.3V, Vss = 0V, unless otherwise noted)
AC OPERATING CONDITIONS AND CHARACTERISTICS
(Ta=0 ~ 70°C, Vdd = 3.3 ± 0.3V, Vss = 0V, unless otherwise noted)
Symbol
Parameter
Test Condition
Limits
Min. Max.
2.4
Unit
VOH(DC) High-Level Output Voltage(DC)
VOL(DC) Low-Level Output Voltage(DC)
VIOZ
)
Ii
Input Current
IOH=-2mA
IOL=2mA
CL=50pF,
IOH=-2mA
VIH=0 ~ Vdd+0.3V
V
V
V
V
0.4
High-Level Output Voltage(AC)
Off-stare Output Current
2
10 uA
Q floating VO=0 ~ Vdd
-5
-10
5 uA
Test Condition
Limits
(max)
Unit
tRC=min.tCLK=min, BL=1, I
OL
=min
1014
mA
CKE=VILmax,tCLK=15ns
CKE=CLK=VILmax(fixed)
CKE=/CS=VIHmin,tCLK=15ns(Note)
CKE=VIHmin,CLK=VILmax(fixed)
42
33
222
204
60
42
519
384
mA
mA
mA
mA
mA
mA
mA
mA
tCLK=min, BL=4, CL=3,I
OL
=0mAall banks active(discerte)
tRC=min, tCLK=min
1059
1374
33
mA
mA
mA
CKE <0.2V
Note:Input signals are changed one time during 30ns.
Symbol
Icc1
Icc2P
Icc2PS
Icc2N
Icc2NS
Icc3P
Icc4
Icc5
Icc6
Parameter
operating current
one bank active (discrete)
precharge stanby current
in power-down mode
burst current
auto-refresh current
self-refresh current
precharge stanby current
in non power-down mode
Icc3PS
Icc3N
active stanby current
in power-down mode
CKE=/CS=VIHmin,tCLK=15ns
CKE=VIHmin,CLK=VILmax(fixed)
Icc3NS
active stanby current
in non power-down mode
one bank active (discrete)
CKE=VILmax,tCLK=15ns
CKE=CLK=VILmax(fixed)
-7, -8
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