參數(shù)資料
型號: MIC2807
廠商: Micrel Semiconductor,Inc.
英文描述: RF PA Power Management IC 2MHz, 600mA DC/DC w/DAC Input and Bypass Switch, Dual Low Noise 200mA/30mA LDO Regulators
中文描述: 射頻功率放大器電源管理IC,600mA的直流/直流瓦特2MHz的/ DAC輸入和旁路開關(guān),雙低噪聲200mA/30mA LDO穩(wěn)壓器
文件頁數(shù): 12/17頁
文件大小: 442K
代理商: MIC2807
Micrel, Inc.
MIC2807
Device Functional Description
The MIC2807 is a power management IC with a single
integrated step-down regulator and two low dropout
regulators. LDO1 is a 200mA low dropout regulator and
LDO2 is a 30mA low dropout regulator. The 500mA
pulse-width-modulated (PWM) step-down regulator
utilizes a dynamically adjustable output voltage for
powering RF power amplifiers. By dynamically adjusting
the output power as necessary, battery life can be
dramatically improved in battery powered RF power
amplifier applications. Also where high power is
required, the step-down PWM regulator has a bypass
mode where an internal 95m
switch shorts the OUT
and PVIN pins together.
January 2007
12
M9999-013007-A
Pin Functional Description
PVIN
PVIN (Power VIN) provides power to the MOSFETs for
the step-down switching regulator section of the
MIC2807, along with the current limit sensing circuitry.
Due to the high switching speeds, a minimum 1μF
capacitor is recommended close to PVIN and the power
ground (PGND) pin for bypassing*.
AVIN
AVIN (Analog VIN) provides power to the internal
reference and control section of the step-down regulator.
AVIN, VIN, and PVIN must all be tied together. Careful
layout should be considered to ensure high frequency
switching noise caused by PVIN is reduced before
reaching AVIN*.
DAC
The DAC pin is the control pin that sets the output
voltage of the step-down regulator. The Output voltage is
3X the voltage set on the DAC pin (V
OUT
= V
DAC
x 3).
When 1.2V or greater is applied to the DAC pin, the
MIC2807’s step-down regulator enters bypass mode. In
bypass mode, the input supply is connected to the
output through a 95m
P-Channel MOSFET.
EN/EN1/EN2
The EN pin provides a logic level control of the step-
down regulator output. In the off state, supply current of
the device is greatly reduced (typically
1μA). Also, in
the off state, the output drive and bypass switch are
placed in a "tri-stated" condition, where both the high
side P-channel MOSFET and the low-side N-channel are
in an off or non-conducting state. EN1 provides logic
control for LDO1, and EN2 provides logic control for
LDO2. Placing a logic high voltage on any one of the
respective enable pins (EN, EN1 or EN2) will turn-on
(powering up the bias and control circuitry) that
respective regulator (DC/DC, LDO1 or LDO2). Do not
drive the enable pins above the supply voltage (AVIN
and VIN).
VIN
VIN provides power to the LDO1 and the LDO2 control
sections of the MIC2807. A minimum 1μF capacitor,
2.2μF recommended, should be placed as close as
possible between the VIN and AGND pins. VIN must
have the same voltage as AVIN*.
OUT
The OUT pin connects the internal bypass drain and the
feedback signal to the output. The bypass applies the
input voltage through a low resistance (95m
typical) P-
Channel MOSFET switch. The feedback signal provides
the control path to set the output at 3 times the DAC
voltage.
SW
The SW pin connects directly to the inductor and
provides the switching current necessary to operate in
PWM mode. Due to the high speed switching on this pin,
the switch node should be routed away from sensitive
nodes.
PGND
PGND (Power GND) is the ground path for the
MOSFETs in the step-down regulator section. The
current loop for the power ground should be as small as
possible and separate from the analog ground (AGND)
loop*.
AGND
AGND (Analog GND) is the ground path for the biasing
and control circuitry. The current loop for the signal
ground should be separate from the Power ground
(PGND) loop*.
LDO1
Regulated output voltage of the LDO1. Power is
provided by VIN. Recommended output capacitance is
2.2μF.
LDO2
Regulated output voltage of the LDO2. Power is
provided by VIN. Recommended output capacitance is
1μF.
BYP
Filter capacitor for the voltage reference for the LDO1
and the LDO2. A 100nF capacitor is recommended from
the BYP pin to ground.
* Refer to PCB layout section of this data sheet for optimal layout
principles.
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