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參數(shù)資料
| 型號： | MIC4720BML |
| 廠商： | Micrel Semiconductor,Inc. |
| 英文描述： | 400 W Transient Voltage Suppressor, SOD123W (SOD2 FlatPower), Reel Pack, SMD |
| 中文描述： | 采用3mm x 3mm 2.0MHz甲集成開關(guān)降壓穩(wěn)壓器 |
| 文件頁數(shù)： | 9/21頁 |
| 文件大?。?/td> | 914K |
| 代理商： | MIC4720BML |
Micrel, Inc.
MIC4720
Pin Description
May 2007
9
M9999-051707
VIN
Two pins for VIN provide power to the source of the
internal P-channel MOSFET along with the current
limiting sensing. The VIN operating voltage range is from
2.7V to 5.5V. Due to the high switching speeds, a 10μF
capacitor is recommended close to VIN and the power
ground (PGND) for each pin for bypassing. Please refer
to layout recommendations.
BIAS
The bias (BIAS) provides power to the internal reference
and control sections of the MIC4720. A 10
resistor
from VIN to BIAS and a 0.1μF from BIAS to SGND is
required for clean operation.
EN
The enable pin provides a logic level control of the
output. In the off state, supply current of the device is
greatly reduced (typically <1μA). Do not drive the enable
pin above the supply voltage.
FB
The feedback pin (FB) provides the control path to
control the output. For adjustable versions, a resistor
divider connecting the feedback to the output is used to
adjust the desired output voltage. The output voltage is
calculated as follows:
+
×
=
1
R2
R1
V
V
REF
OUT
where V
REF
is equal to 1.0V.
A feedforward capacitor is recommended for most
designs using the adjustable output voltage option. To
reduce current draw, a 10K feedback resistor is
recommended from the output to the FB pin (R1). Also, a
feedforward capacitor should be connected between the
output and feedback (across R1). The large resistor
value and the parasitic capacitance of the FB pin can
cause a high frequency pole that can reduce the overall
system phase margin. By placing a feedforward
capacitor, these effects can be significantly reduced.
Feedforward capacitance (C
FF
) can be calculated as
follows:
200kHz
R1
2
1
×
C
FF
×
=
π
SW
The switch (SW) pin connects directly to the inductor
and provides the switching current necessary to operate
in PWM mode. Due to the high speed switching on this
pin, the switch node should be routed away from
sensitive nodes. This pin also connects to the cathode of
the free-wheeling diode.
PGOOD
Power good is an open drain pull down that indicates
when the output voltage has reached regulation. For a
power good low, the output voltage is within ±10% of the
set regulation voltage. For output voltages greater or
less than 10%, the PGOOD pin is high. This should be
connected to the input supply through a pull up resistor.
A delay can be added by placing a capacitor from
PGOOD to ground.
PGND
Power ground (PGND) is the ground path for the
MOSFET drive current. The current loop for the power
ground should be as small as possible and separate
from the Signal ground (SGND) loop. Refer to the layout
considerations for more details.
SGND
Signal ground (SGND) is the ground path for the biasing
and control circuitry. The current loop for the signal
ground should be separate from the power ground
(PGND) loop. Refer to the layout considerations for more
details.
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