參數(shù)資料
型號: MIC4807BN
廠商: MICREL INC
元件分類: 外設(shè)及接口
英文描述: 80V 8-Channel Addressable Low-Side Driver
中文描述: 0.19 A 8 CHANNEL, ADDR LATCH BASED PRPHL DRVR, PDIP18
封裝: PLASTIC, DIP-18
文件頁數(shù): 8/8頁
文件大?。?/td> 103K
代理商: MIC4807BN
MIC4807
Pin Description
Micrel
7-10
October 1998
Pin No.
Pin Name
Functional Description
5
Ground
Electrical ground to chip substrate.
12
V
DD
Positive logic supply voltage (10V-15V).
1, 2, 8,
9,10, 11,
17,18
HVOUT
0
through HVOUT
7
These are the high voltage (HV) open outputs, each of which is capable of
sinking 100mA when switched on, and standing off 80V when switched off.
In addition, each output channel is equipped with an analog current limiter
to protect it from shorts to the positive high voltage supply. When an output
is shorted (up to 80V), a maximum of 225mA (200mA nominal) will flow
through it to ground.
13, 14, 15
C
IN
, B
IN
, &A
IN
When these inputs are combined together they form the BCD address used
to select the desired output. Each input is TTL compatible with an internal
pull-up current source of 50mA.
6
CS
When CS is at logic "0" the device is actively addressed, and when CS is
at logic "1" the decoded address and input Data are inhibited, making
the part unaddressable. CS is TTL compatible with an internal pull-down
current sink of 75
μ
A.
7
Clear
Clear resets all the outputs to the off state when pulled to logic "0", and is
TTL compatible with an internal pull-down current sink of 75
μ
A.
16
Data-in
Data-in determines the state of the output being addressed. When Data-
in is at logic "0" the addressed output is turned off, and when Data-in is at
logic "1" the addressed output is turned on. Data-in is TTL compatible with
an internal pull-up current source of 50
μ
A.
4
OE
OE allows the bank of eight outputs to be duty cycled together. When OE
is at logic "1" the outputs are enabled to follow their respective latches, and
when OE is at logic "0" all the outputs are turned off. OE is TTL Compatible
with a pull-down current sink of 75
μ
A.
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