參數(shù)資料
型號: MIC5312-GMBML
廠商: MICREL INC
元件分類: 固定正電壓多路輸出LDO穩(wěn)壓器
英文描述: LowQ Mode Dual 300mA LDO with Integrated POR
中文描述: DUAL OUTPUT, FIXED POSITIVE LDO REGULATOR, DSO10
封裝: 3 X 3 MM, MLF-10
文件頁數(shù): 11/11頁
文件大?。?/td> 400K
代理商: MIC5312-GMBML
Micrel, Inc.
MIC5312
February 2005
9
M9999-021105
(408) 955-1690
Functional Description
The MIC5312 is a high performance, low quiescent
current power management IC consisting of two Cap
low dropout regulators with a LowQ mode featuring
lower operating current. Both regulators are capable of
sourcing 300mA. A POR circuit monitors both of the
outputs and indicates when the output voltage is within
5% of nominal. The POR offers a delay time that is
externally programmable with a single capacitor to
ground.
Enable 1 and 2
The enable inputs allow for logic control of both output
voltages with individual enable inputs. The enable input
is active high, requiring 1.0V for guaranteed operation.
The enable input is CMOS logic and cannot be left
floating.
There are two regulators in the MIC5312 that share a
common bias. Each regulator can be enabled
independently by setting the voltage on pins EN1 and
EN2 to either logic high or low to turn the channel on or
off. It is also possible to enable both channels by
applying a voltage above 1.0V to both enable pins.
Power-On Reset (POR)
The power-on reset output is an open-drain N-Channel
device, requiring a pull-up resistor to either the input
voltage or output voltage for proper voltage levels. The
POR output has a delay time that is programmable with
a capacitor from the SET pin to ground. The delay time
can be programmed to be as long as 1 second.
The SET pin is a current source output that charges a
capacitor that sets the delay time for the power-on reset
output. The current source is a 1.25uA current source
that charges a capacitor up from 0V. When the capacitor
reaches 1.25V, the output of the POR is allowed to go
high. The delay time in micro seconds is equal to the
Cset in picofarads.
POR Delay (s) = CSET (pF)
LowQ Mode
The LowQ pin is logic level low, requiring <0.2V to
enter the LowQ mode. The LowQ pin cannot be left
floating. Features of the LowQ mode include lower
total quiescent current of typically 7uA.
LowQ Mode can be used in many portable electronics
applications where long battery life is crucial. These
include cell phones, mp3 players, digital cameras and
PDAs. The lower ground current will increase the life of
the battery and prolong the usage between charges.
Input Capacitor
Good bypassing is recommended from input to ground
to help improve AC performance. A 1F capacitor or
greater located close to the IC is recommended. Larger
load currents may require larger capacitor values.
Bypass Capacitor
The internal reference voltage of the MIC5312 can be
bypassed with a capacitor to ground to reduce output
noise and increase input ripple rejection (PSRR). A
quick-start feature allows for quick turn-on of the output
voltage. The recommended nominal bypass capacitor is
0.01F, but an increase will result in longer turn on
times ton.
Output Capacitor
Each regulator output requires a 2.2F ceramic output
capacitor for stability. The output capacitor value can be
increased
to
improve
transient
response,
but
performance has been optimized for a 2.2F ceramic
type output capacitor. X7R/X5R dielectric-type ceramic
capacitors
are
recommended
because
of
their
temperature performance. X7R-type capacitors change
capacitance by 15% over their operating temperature
range and are the most stable type of ceramic
capacitors. Z5U and Y5V dielectric capacitors change
value by as much as 50% to 60% respectively over their
operating temperature ranges. To use a ceramic chip
capacitor with Y5V dielectric, the value must be much
higher than a X7R ceramic capacitor to ensure the same
minimum capacitance over the equivalent operating
temperature range.
Thermal Considerations
The MIC5312 is designed to provide 300mA of
continuous current per channel in a very small MLF
package. Maximum power dissipation can be calculated
based on the output current and the voltage drop across
the part. To determine the maximum power dissipation
of the package, use the junction-to-ambient thermal
resistance of the device and the following basic
equation:
PD (max) = (TJ (max) - TA) /θJA
TJ (max) is the maximum junction temperature of the
die, 125°C, and TA is the ambient operating
temperature.
θJA is layout dependent; Table 1 shows
examples of the junction-to-ambient thermal resistance
for the MIC5312.
Table 1. MLF Thermal Resistance
Package
θ
JA Recommended
Minimum Footprint
θ
JC
3x3 MLF-10
63°C/W
2°C/W
相關(guān)PDF資料
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