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參數(shù)資料
| 型號(hào)： | MIC70__N |
| 廠商： | Micrel Semiconductor,Inc. |
| 英文描述： | 40000 SYSTEM GATE 3.3 VOLT LOGIC CELL AR - NOT RECOMMENDED for NEW DESIGN |
| 中文描述： | レP監(jiān)控電路 |
| 文件頁(yè)數(shù)： | 4/8頁(yè) |
| 文件大?。?/td> | 185K |
| 代理商： | MIC70__N |
4
Manual Reset Input forces reset outputs to assert when
pulled below 0.8V. An internal pull-up current of 250
μ
A on
this input forces it high when left floating. This input can
also be driven from TTL or CMOS logic.
Primary supply input, +5V.
IC ground pin, 0V reference.
Power fail input. Internally connected to the power fail
comparator which is referenced to 1.25V. The power fail
output (PFO) remains high if PFI is above 1.25V. PFI
should be connected to GND or VOUTif the power fail
comparator is not used.
Power fail output. The power fail comparator is
independent of all other functions on this device.
Watchdog input. The WDI input monitors microprocessor
activity, an internal watchdog timer resets itself with each
transition on the watchdog input. If the WDI pin is held high
or low for longer than the watchdog timeout period, WDO is
forced to active low. The watchdog function cannot be
disabled.
No Connect
RESET is asserted if either VCCgoes below the reset
threshold or by a low signal on the manual reset input (MR).
RESET remains asserted for one reset timeout period
(200ms) after VCCexceeds the reset threshold or after the
manual reset pin transitions from low to high. The
watchdog timer will not assert RESET unless WDO is
connected to MR.
Output for the watchdog timer. The watchdog timer resets
itself with each transition on the watchdog input. If the WDI
pin is held high or low for longer than the watchdog timeout
period, WDO is forced low. WDO will also be forced low if
VCCis below the reset threshold and will remain low until
VCCreturns to a valid level.
RESET is the compliment of RESET and is asserted if
either VCCgoes below the reset threshold or by a low
signal on the manual reset input (MR). RESET is suitable
for microprocessors systems that use an active high reset.
Pin No.
MIC706P
Pin Name
MIC706
R/S/T
MIC708
MR
1
1
1
VCC
2
2
2
GND
3
3
3
PFI
4
4
4
PFO
5
5
5
WDI
6
6
N/A
N/C
N/A
N/A
6
RESET
7
N/A
7
WDO
8
8
N/A
RESET
N/A
7
8
Pin Functions
MIC706P/R/S/T, MIC708R/S/T
μ
P Supervisory Circuits
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| MIC708T | μP Supervisory Circuit(μP監(jiān)控電路（帶電源故障警告和手動(dòng)復(fù)位）) |
| MIC706R | μP Supervisory Circuit(μP監(jiān)控電路（帶看門(mén)狗定時(shí)器，微處理器復(fù)位，電源故障警告和手動(dòng)復(fù)位功能）) |
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| MIC708R | μP Supervisory Circuit(μP監(jiān)控電路（帶電源故障警告和手動(dòng)復(fù)位）) |
| MIC708S | μP Supervisory Circuit(μP監(jiān)控電路（帶電源故障警告和手動(dòng)復(fù)位）) |
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