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參數(shù)資料
| 型號(hào)： | MIG20J501L |
| 廠商： | Toshiba Corporation |
| 英文描述： | MIG20J501L |
| 中文描述： | MIG20J501L |
| 文件頁(yè)數(shù)： | 11/20頁(yè) |
| 文件大?。?/td> | 200K |
| 代理商： | MIG20J501L |
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MIG20J501L
2001-05-07
11
Timing Chart for Control Power Supply Under Voltage Protection Sequence (UV)
(1)
Upon occasion of control power supply under voltage, gate voltage (V
GE
) is interrupted and IGBT moves
into ‘off-stage’.
(This condition continues between UV Trip Level and UV Reset Level as shown in the chart)
An error signal output (V
FO
) stays in ‘L’ level until the power supply voltage returns to the reset level after
the voltage reaches to the trip level.
The reset operation is provided on condition that power supply voltage returns to the UV reset level and
input signal turns from operation “H” to “L”.
(2)
(3)
Timing Chart
(Only low side)
V
IN
V
GE
I
C
V
FO
t
FO
t
FO
H
L
0
0
0
UV Reset Level
UV Trip Level
t
FO
V
D
0
Noise immunizing
time 10 s
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