參數(shù)資料
型號: MK1491-09FILNTR
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 5/10頁
文件大?。?/td> 0K
描述: IC CLK SRC AMD GEODE GX2 28-SSOP
標準包裝: 1,000
類型: 時鐘/頻率合成器
PLL:
主要目的: AMD CPU
輸入: 晶體
輸出: LVCMOS
電路數(shù): 1
比率 - 輸入:輸出: 1:12
差分 - 輸入:輸出: 無/無
頻率 - 最大: 66MHz
電源電壓: 3.15 V ~ 3.45 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
供應商設備封裝: 28-SSOP
包裝: 帶卷 (TR)
MK1491-09
AMD GEODE GX2 CLOCK SOURCE
CLOCK SYNTHESIZER
IDT AMD GEODE GX2 CLOCK SOURCE
4
MK1491-09
REV M 051310
Power Down Control Table
Power-on Default Conditions
External Components
The MK1491-09 requires some inexpensive external
components for proper operation. Decoupling capacitors of
0.1F should be connected on each VDD pin to ground, as
close to the MK1491-09 as possible. A series termination
resistor of 33
may be used for each clock output. See the
discussion below for other external resistors required for
proper I/O operation. The 14.318 MHz oscillator has internal
caps that provide the proper load for a parallel resonant
crystal with CL=18 pF. For tuning with other values of CL, the
formula 2*(CL-18) gives the value of each capacitor that
should be connected between X1 and ground and X2 and
ground.
I/O Structure
The MK1491-09 provides more functionality in a 28-pin
package by using a unique I/O technique. The device
checks the status of all I/O pins during power-up. This status
(pulled high or low) then determines the frequency
selections and power down modes (see the tables on pages
2 and 3). Within 10ms after power up, the inputs change to
outputs and the clocks start up. In the diagrams below, the
33
resistors are the normal output termination resistors.
The 10k
resistor pulls low to generate a logic zero when
needed. Weak internal pull-up resistors are present on TS#,
Spread#, PD#, and Sel66/33 to pull the pin to high when left
floating.
*Note: Do not use a TTL load. This will overcome the 10 k
pull-down and force the input to a logic 1.
PD#
Functions
0
All clocks are stopped low.
1
All clocks are running.
Pin #
Function
Default
Condition
14
TS#
H
Latched input. All outputs enabled when high. When low, all outputs are in
tristate.
27
Spread#
H
Latched input. Spread disabled when high. When low, spread is enabled
on all outputs except ref clocks and 48 MHz.
10
Sel66/33#
H
This is an active input. When high, it selects PCI=66 MHz outputs; when
low, selects PCI frequency = 33 MHz outputs.
33
To load*
10 k
I/O
For select
= 0 (low)
Do not stuff for
“1” selection
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